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# Sr. DFT Engineer, AI Hardware

- **Company:** Tesla Motors
- **Location:** Austin, TX, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Boolean Algebra, Code Coverage, Computer Engineering, Software Debugging, Logic Synthesis of Circuits, Perl (Programming Language), Joint Test Action (IEEE Standards), Python (Programming Language), Tcl (Programming Language), Verilog, Scripting, Hardware Acceleration, Physical Design
- **Published:** June 25, 2026
- **Apply:** https://diversityjobs.com/career/13988797/Sr-Dft-Engineer-Self-Driving-Texas-Austin

## About the Role

* Knowledge of Testability techniques and features (Compressed Scan, Built-in-Self-Test,Loop-Back, Boundary Scan) covering digital logic domain, embedded memories and PHY/IO's
 * Well versed in JTAG / 1500 / 1687 networks. BSDL, ICL and PDL knowledge preferable
 * Expertise in ATPG, coverage analysis, and zero-delay / SDF-based pattern simulations. Experience with Cadence DFT tools (Modus and Genus) or Mentor DFT tools (Tessent Shell) preferred
 * Goodknowledge of Verilog, logic design, circuit design fundamentalsas well as timing
 * Working knowledge of TCL, python (or another scripting language like Perl)
 * Experience in implementation of MBISTand knowledge of repair schemes, algorithmsis a plus
 * Experience or working knowledge of SERDES, Analog /mixed-signal DFT techniques (like IOBIST,loop-backsetc.) is a plus
 * Post Silicon experience in Pattern conversion for Testers, PatternBring-up& Debug, SiliconCharacterization etc. is a plus
 * Degreein Computer Engineering or Electrical Engineering orequivalent experience with evidence of exceptional abilities

## Description

We are open to hiring in Austin, TX; Palo Alto, CA.
What You'll Do

 * Define and implement variousDFTfeatures at RTL and gates usingin-house flows
 * Work closely with the physical design team in achievingdesign closure with DFT features
 * Perform block-level scan insertion, ATPG, coverage analysis, and simulations
 * Run top-level test pattern retargeting and simulations
 * Identify design changes needed for improving test coverage
 * Work with test / product engineering team members ontest pattern delivery and Si bring up


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