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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # PIC Systems Design Engineer - **Company:** Advanced Micro Devices, Inc. - **Location:** San Jose, CA, United States - **Salary:** $232,000.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Content Management Interoperability Services, Software Debugging, IEEE Standards Association, Performance Tuning, Software Engineering, System Testing, Computer Networking Systems, PIC Microcontroller, Oracle Cloud Infrastructure - **Published:** June 5, 2026 - **Apply:** https://jobs.localjobnetwork.com/job/detail/40376749/PIC-Systems-Design-Engineer ## About the Role The ideal candidate is a collaborative and proactive technical leader with strong communication skills, able to clearly translate complex photonics concepts and align cross-functional teams. They excel at driving consensus, navigating ambiguity, and solving challenging system-level reliability issues while maintaining a customer-focused mindset and strong attention to detail., * Experience with high-baud optical communication devices and systems * Strong working experience in optical transceiver design, fiber optics, RF modulation, and networking systems. * Experience with schematic and layout design for photonic integrated circuits * Familiarity with MSA and IEEE standards for optical transceivers, CPO, NPO (e.g., OCI, QSFP, OSFP, CMIS). * Experience testing transceiver performance: TDECQ, receiver sensitivity, stressed eye measurements. * System-level understanding of current and emerging optical transceiver / CPO / NPO architectures and standards. * Strong verbal and written communication skills, you must be a great team player and capable of interfacing across technical and managerial levels. * Strong problem-solving skills and collaborative, proactive attitude. * Willingness to travel when required. * ACADEMIC CREDENTIALS: * MS or PhD in Electrical Engineering or related field. ## Description We are seeking a highly skilled PIC System Design Engineer to drive photonic integrated circuit system-level design, modeling, and validation of next-generation photonic integrated circuits for datacenter and AI interconnect applications. You will play a key role in aligning product specifications with hyperscale customer requirements and ensuring robust system performance from concept to deployment., Photonic Integrated Circuit Architecture & Modeling * Define PIC architecture for high-speed links (100G/200G per lane and beyond) * Perform link-level modeling and performance analysis, including: Link budget, OSNR, dispersion, noise modeling and Impact of impairments (RIN, jitter, crosstalk, nonlinearities) * Develop detailed requirements, specifications, verification plans, and roadmaps for PICs Specification Definition & Customer Engagement * Engage directly with internal customers such as GPU/CPU system architects and external customers (hyperscalers, networking OEMs) on: * Technical discussions and architecture trade-offs * Specification alignment (performance, power, reach, interoperability) * Translate customer requirements into internal design targets and system specifications Design Trade-Off & Cross-Functional Alignment * Work with SerDes, optical device, packaging, and SI/PI teams to: * Optimize system performance across optical, electrical, and thermal domains * Balance performance, power, cost, and manufacturability Pre-silicon & Post-silicon Validation * Develop software design flows for ensuring first silicon success * Define test vectors based on a deep engineering understanding of integrated photonics first principles * Coordinate and work alongside test engineers to test BER, eye diagram, TDEC/TDECQ, sensitivity, optical power measurements, and other relevant metrics * Correlate simulation results with lab measurements and update models * Debug system-level issues across: * Optical components (laser, modulator, photodetector, etc) * Electrical interfaces (DSP, SerDes, driver/TIA) * Packaging and coupling effects System-Level Bring-Up & Debug * + Support Optical Engine bring-up on XPU and / or switch platforms + Conduct interoperability and system validation testing + Lead root cause analysis for performance gaps, AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. 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