AMD Versal - PL Integration & IPC Engineer
Role details
Job location
Tech stack
Requirements
We have an immediate need for an AMD Versal / PL Integration & IPC (iRDK) Engineer with 5+ years of embedded software development experience and hands-on expertise in AMD Versal or Xilinx Zynq UltraScale+ SoCs, FPGA/Programmable Logic (PL) integration, and inter-processor communication (IPC).
This is an onsite position based in Palo Alto, CA for a candidate with deep experience in AMD Versal, Zynq UltraScale+, Programmable Logic (PL), FPGA IP Integration, Vitis, Vitis HLS, Petalinux, Yocto, AXI Interconnect, AXI Interfaces, RPMsg, OpenAMP, Shared Memory, BSP Development, Device Driver Development, RPU/APU Partitions, Embedded C/C++, Python, Rust, Xilinx/AMD SDK Toolchain, DMA Engines, JTAG, and Xilinx hardware debug tools.