Hardware Design Engineer
Role details
Job location
Tech stack
Job description
- Design architecting and trade-off analysis
- RTL coding and verification
- Memory Controller + PHY integration and verification
- Customer delivery and support
Requirements
Strong System Verilog/Verilog RTL design expertise
- Questa/Incisive/VCS simulator experience
- Python/Perl/Tcl scripting experience
- Significant ASIC and/or FPGA design experience
- Ability to learn quickly and work independently
- Solid communication and project management skills
- 5+ years of logic design experience
- BSEE
Definite Plus:
- ASIC synthesis, timing constraint, CDC/RDC experience
- Verification experience
- Memory (HBM, GDDR, LPDDR, DDR) expertise
- AMBA AXI or CHI design experience
- Located in the Hillsboro, Oregon area
Benefits & conditions
Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.
The US salary range for this full-time position is $106,900 to $198,500. Our salary ranges are determined by role, level and location. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.