Staff Engineer, Design Verification Engineering

Analog Devices
Chandler, United States of America
20 days ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English
Experience level
Intermediate
Compensation
$ 199K

Job location

Remote
Chandler, United States of America

Tech stack

C
Data Centers
Logic Synthesis of Circuits
Perl
Formal Verification
Python
SystemVerilog
Test Case Design
Universal Asynchronous Receiver/Transmitter
Verilog
Scripting (Bash/Python/Go/Ruby)
Serial Peripheral Interface
Software Verification
State Machines
Power Analysis (Cryptography)
Automotive

Job description

Define and verify interfaces, state machines, and controlling logic required to implement new products for Data Center, Energy, and Automotive applications. Develop directed and constrained random test cases in SystemVerilog. Architect, implement, and/or manage complete metric-driven SystemVerilog and UVM verification environments as determined by project complexity. SystemVerilog Assertion for Dynamic and Formal Verification. Design and maintain mixed-signal simulation (Cadence AMS); write Verilog-AMS and

Requirements

Requirements: Must have a Master's degree in Electrical Engineering, Materials Engineering, Physics, or closely related technical discipline (willing to accept foreign education equivalent) and four (4) years of experience as a Design Verification Engineer or related occupation performing module level design performing with Verilog RTL and function verification.

Alternatively, employer will accept a Bachelor's degree in Electrical Engineering, Materials Engineering, Physics, or closely related technical discipline (willing to accept foreign education equivalent) and six (6) years of experience as a Design Verification Engineer or related occupation performing module level design performing with Verilog RTL and function verification.

Must also possess the following (quantitative experience requirements not applicable to this section):

  • Demonstrated Expertise ("DE") with mixed signal IC verification techniques (SystemVerilog and UVM), verification test plan creation, coverage closure, test case and regression suite development.
  • DE defining, designing, and verifying experience with custom state machines and control logic for use with analog and mixed signal circuits such as data converters, linear regulators, high speed serial interfaces, and microcontrollers.
  • DE defining and implementing custom digital interfaces (I2C, SPI, and UART).
  • DE with logic synthesis with timing and placement constraints, timing and power analysis, logic equivalence checking, design for test, scan insertion, and ATPG.
  • DE with verification tools (Xcelium or VCS), and scripting languages (Perl, Python, and C).

About the company

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) .

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