RTL Design Engineer

Apple Inc.
San Diego, United States of America
4 days ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English
Experience level
Senior
Compensation
$ 302K

Job location

San Diego, United States of America

Tech stack

Analogue Electronics
Boolean Algebra
Software Debugging
Digital Electronics
Perl
Hardware Design
Python
Software Tools
Signal Processing
Static Timing Analysis
SystemVerilog
Verilog
Scripting (Bash/Python/Go/Ruby)
Parallel Computation
Generative AI
Optimization Algorithms
Front End Software Development

Job description

At Apple, we work every day to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon design team!

This role will build upon your solid foundation in digital logic circuits while introducing mixed-signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits, ensuring formal equivalence between custom designs and their abstract representations. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.

As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits with signal processing capabilities., In this role, you will be responsible for specifying and/or micro-architecting digital and signal processing blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others, including implementation of DSP algorithms. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, and validating signal processing performance.","responsibilities":"RTL Design & Implementation: Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal processing pipelines

DSP Algorithm Translation: Collaborate with algorithm engineers to translate DSP concepts (filtering, transforms, modulation, signal analysis) into efficient, high-performance RTL implementations

Design Verification: Write comprehensive assertions, unit-level testbenches, and participate in functional verification using industry-standard methodologies

Integration & Bring-up: Partner with cross-functional teams to integrate complex IPs, validate performance in silicon, and support lab characterization

Collaborative Problem-Solving: Work effectively with analog designers, algorithm engineers, verification specialists, and system architects across disciplinary boundaries

Requirements

Do you have experience in Verilog?, Do you have a Bachelor's degree?, Front-end tools expertise (Verilog simulators, linters, clock-domain crossing checkers)

Synthesis, static timing analysis, and design-for-test (DFT)

SystemVerilog assertions, checkers, and advanced verification techniques

Scripting languages (Perl, Python)

Formal verification and low-power design methodologies

Hardware-software co-design and system-level optimization

Hands-on DSP experience: signal processing concepts, RTL algorithm implementation, hardware optimization techniques (pipelining, parallelization, resource sharing)

Intermediate to advanced GenAI proficiency: Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI capabilities/limitations in hardware design, BS and a minimum of 10 years relevant industry experience

Benefits & conditions

4.14.1 out of 5 stars San Diego, CA $171,600 - $302,200 a year, Pulled from the full job description

  • Employee stock purchase plan
  • Health insurance
  • Retirement plan
  • Dental insurance
  • RSU, At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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