Senior Digital Design & Verification Engineer
NXP
Canton de Caen-2, France
12 days ago
Role details
Contract type
Permanent contract Employment type
Full-time (> 32 hours) Working hours
Regular working hours Languages
English Experience level
SeniorJob location
Canton de Caen-2, France
Tech stack
Data analysis
Communications Protocols
Computer Engineering
Microarchitecture
Software Debugging
Logic Synthesis of Circuits
Electronic Design Automation
Perl
Formal Verification
Python
SystemVerilog
Tcl (Programming Language)
Universal Asynchronous Receiver/Transmitter
Verilog
Scripting (Bash/Python/Go/Ruby)
Serial Peripheral Interface
PIC Microcontroller
Code Inspection
Job description
NXP Semiconductors France is seeking a highly skilled and experienced Senior Digital Design & Verification Engineer to contribute to the development of cutting-edge automotive and industrial products. This role involves leading aspects of the digital design and verification flow, ensuring high-quality and robust silicon solutions., * Lead and execute digital design activities from specification to RTL implementation, including micro-architecture definition, clock domain crossing (CDC) analysis, and linting.
- Develop and implement comprehensive verification plans, including testbench architecture, UVM-based verification environments, and assertion-based verification.
- Perform functional verification, formal verification, and gate-level simulations to ensure design correctness and robustness.
- Collaborate with system architects, analog designers, and software teams to define design requirements and resolve integration challenges.
- Debug complex design and verification issues, identify root causes, and propose effective solutions.
- Contribute to continuous improvement of design and verification methodologies, tools, and flows.
- Mentor junior engineers and provide technical guidance within the team.Generate detailed documentation for design, verification, and analysis.
Requirements
Do you have experience in Verilog?, Do you have a Master's degree?, * Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Minimum of 7 years of experience in digital IC design and verification.
- Proven expertise in RTL design (Verilog/SystemVerilog) and strong understanding of digital design principles.
- Extensive experience with UVM (Universal Verification Methodology) for testbench development and verification.
- Proficiency in industry-standard EDA tools for simulation, synthesis, linting, and formal verification.
- Solid understanding of embedded systems, microcontrollers, and communication protocols (e.g., SPI, I2C, UART, CAN, LIN).
- Experience with scripting languages (e.g., Python, Perl, Tcl) for automation and data analysis.
- Strong analytical, problem-solving, and debugging skills.
- Excellent communication and interpersonal skills, with the ability to work effectively in a collaborative team environment.
- Fluency in English (written and spoken) is required.