ASIC Digital Design, Staff Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video, Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You bring extensive ASIC digital design experience with a track record of delivering production RTL for complex semiconductor IP. Your expertise encompasses timing closure, power optimization, and design quality across advanced process nodes. You work effectively across organizational boundaries, collaborating with architecture, analog, verification, and physical design teams. You manage technical tradeoffs systematically, balancing performance, area, and power requirements while maintaining schedule commitments. When faced with evolving specifications, you provide data-driven analysis and practical solutions. At Synopsys, you will contribute to LPDDR PHY IP that powers mobile and AI applications in production silicon worldwide. What You'll Be Doing

• Design RTL modules for LPDDR PHY IP from microarchitecture through synthesis-ready implementation
• Optimize designs to meet timing, power, and area targets across multiple process nodes
• Develop automation for design generation and flow integration
• Collaborate with cross-functional teams to resolve timing and power challenges
• Contribute to design reviews and methodology development

The Impact You Will Have

• Your designs will enable LPDDR PHY IP deployed in high-volume mobile, automotive, and AI products
• You will contribute to a major revenue-generating product line for Synopsys
• Your work will define performance characteristics for customer systems-on-chip
• Your automation will improve design efficiency across the engineering team
• Your expertise will influence architectural decisions for future products, Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You'll be invited to meet with members of the hiring team to discuss your skills and experience, and what you're looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you've joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you'll be invited to join activities and training to help you ramp up for a successful future at Synopsys!, NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading GPUs and SoCs. This position offers the opportunity to have real impact in a dynam…

• 9 days ago

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
• 5+ years of ASIC digital design experience with RTL ownership in production silicon
• Expert Verilog proficiency for timing-critical designs
• Strong Perl scripting skills for design automation
• Deep knowledge of synthesis, timing analysis, and power optimization
• Experience with PHY IP or high-speed interfaces is preferred

Who You Are

• You understand how RTL structure affects timing and power outcomes
• You communicate effectively across technical disciplines
• You produce maintainable code that supports collaboration
• You identify process improvements proactively
• You resolve technical issues through systematic analysis

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys-considers-all-applicants-for-employment-without-regard-to-race,-color,-religion,-national-origin,-gender,-sexual-orientation,-age,-military-veteran-status,-or-disability. /span /p custom_fields.Disclaimer- p span-style="color:-rgb(0,-0,-0);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys-offers-comprehensive-health,-wellness,-and-financial-benefits-as-part-of-a-competitive-total-rewards-package.-The-actual-compensation-offered-will-be-based-on-a-number-of-job-related-factors,-including-location,-skills,-experience,-and-education.-Your-recruiter-can-share-more-specific-details-on-the-total-rewards-package-upon-request.-The-base-salary-range-for-this-role-is-across-the-U.S. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields.SalaryRange-$114000-$170000 custom_fields.SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-07-09 custom_fields.Multikeywordfacets-Hardware"> Join our Talent Community! . Find Jobs For Where? Search Jobs ASIC Digital Design, Staff Engineer -18138 Boxborough, Massachusetts, United States Engineering Employee $114000-$170000, You will join the team responsible for microarchitecture and front-end design of LPDDR PHY IP. This core product generates significant revenue and enables critical functionality in customer designs across mobile, automotive, and AI markets. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S. Save Job test Share Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Hiring Journey at Synopsys