Senior Embedded Software Engineer
Role details
Job location
Tech stack
Job description
We are seeking an Embedded PetaLinux Software Engineer to build and maintain PetaLinux-based Board Support Packages (BSPs) for the AMD/Xilinx Zynq UltraScale+ MPSoC (initially on ZCU102, evolving to custom hardware). The role includes embedded Linux bring-up, device-tree + kernel configuration, and development of user-space applications to control FPGA-attached hardware, stream high-rate data, and record radar data to a PC for analysis and visualization.
You'll work closely with FPGA, and systems teams to integrate drivers, validate peripherals, and build reliable data pipelines for development and test.
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Create and maintain PetaLinux projects and BSPs: platform bring-up, image generation, kernel configuration, rootfs customization, and packaging.
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Integrate hardware handoff artifacts (e.g., XSC), configure boot chain, and support Linux boot on Zynq UltraScale+ MPSoC platforms.
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Author/maintain device tree changes for custom IP/peripherals; debug peripheral enumeration and Linux subsystem integration.
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Maintain reproducible builds (Yocto/PetaLinux layers, versioning, build docs, CI hooks as appropriate).
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Support board bring-up and peripheral checkout (GPIO, SPI, UART, Ethernet, DMA, etc.), troubleshooting boot/performance issues.
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Implement/modify low-level board support and (as needed) Linux device drivers for custom data paths and control interfaces.
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Develop user-space applications (C++) to:
- Configure/control hardware (register access, SPI/UART devices, GPIO, timing, sensors)
- Stream data from the MPSoC to a PC (UDP) for visualization and recording
- Record high-rate radar products (I/Q maps, metadata) reliably to SSD with indexing and replay support
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Build and maintain host-side tools (Windows or Linux) for capture, verification, file conversion, and integration with downstream processing/UI.
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Create test utilities and automated validation (unit-tests, bring-up scripts, throughput tests, etc.).
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Profile and optimize throughput and CPU usage (zero-copy paths where possible, DMA + buffer management, network tuning).
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Collaborate across FPGA/EE/SW to diagnose integration issues and propose architecture improvements.
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Performs other duties as assigned.
Requirements
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BS in EE/CE/CS (or equivalent experience)
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5+ years of trong embedded Linux experience on SoCs (boot, BSPs, kernel/rootfs, device tree)
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Hands-on experience with PetaLinux and/or Yocto-based BSP workflows for Zynq UltraScale+ MPSoC class devices
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Solid C/C++ proficiency (or strong Python with systems-level comfort); ability to debug across user/kernel boundaries
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Experience with Linux networking and high-throughput data movement (socket programming, buffering, backpressure, performance tuning)
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Comfortable with lab bring-up: serial consoles, JTAG/debug, logs, packet capture, and hardware/software co-debug
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Direct experience with ZCU102 (or similar Zynq UltraScale+ dev boards) and FPGA+Linux integration
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Experience developing/maintaining Linux drivers, DMA interfaces, or high-rate acquisition pipelines
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Familiarity with AMD/Xilinx embedded software ecosystem (e.g., Vitis, PetaLinux tooling, Yocto)
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Experience with data recording formats for large binary products (chunked files, circular buffers, memory-mapped I/O, etc.)
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Familiarity with containerized build environments, CI/CD for embedded builds, and release/version management
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Nice-to-have: radar/DSP domain familiarity (I/Q data, FFT maps, GPS synchronization)
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Target: AMD/Xilinx Zynq UltraScale+ MPSoC on ZCU102, evolving to custom boards
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OS/Build: PetaLinux / Yocto-based embedded Linux
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Languages: C/C++, Python, Svelte, Javascript
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Host: Windows and/or Linux tooling for capture, control, and analysis
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Bootable, versioned PetaLinux image with documented build + bring-up procedure
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Stable device-tree/kernel configuration for required peripherals
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Control application/API that configures hardware deterministically
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Sustained, verified data streaming and PC SSD recording for radar products with integrity checks and replay tools
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Automated throughput and regression tests
This position offers flexible work arrangements, including fully on-site, hybrid, or remote options. Proximity to the Panama City, FL location is preferred for hybrid candidates. Remote candidates must have access to development and testing hardware and maintain consistent communication across teams.
Some positions will require access to U.S. National Security information. Positions that require this access will be required to receive and maintain a U.S. government personnel security clearance (PCL). In order to qualify for this position, the candidate must be a US Citizen and either currently possess this National Security eligibility or be able to complete the investigation application process with a favorable determination and maintain that eligibility throughout their employment.
Benefits & conditions
Paid Time Off
Paid Company Holidays
Medical, Dental & Vision Insurance
Optional HSA and FSA
Base and Voluntary Life Insurance
Short Term & Long-Term Disability Insurance
401k Matching
Employee Assistance Program
The pay range for this role is:
126,323 - 154,924 USD per year (Remote (United States))