Senior Hardware Acceleration Efficiency Architect

We're seeking an Emulation and FPGA Efficiency Architect to improve the performance, utilization, and availability of Arm's global hardware acceleration infrastructure.

As part of Arm's Productivity Engineering Group, you'll work across emulation, FPGA, scheduling, operations, and EDA vendor integrations to improve platform throughput and engineering productivity at scale., * Benchmark emulation and FPGA workloads to quantify performance and utilization baselines, and track improvements over time.

• Improve system availability and job throughput by optimizing scheduling, queuing, and recovery mechanisms.
• Integrate with EDA vendor APIs to automate resource management, supervise usage, and streamline job orchestration.
• Collaborate with Arm's in-house scheduler team to enhance scheduling intelligence and resource allocation for emulation and FPGA workloads.
• Develop data pipelines and performance dashboards to visualize trends, detect inefficiencies, and guide tuning efforts.
• Drive continuous improvement through automation and workflow optimization.
• Partner with EDA tool vendors (e.g., Cadence, Synopsys, Siemens) to validate and deploy performance enhancements in production workloads.

• Strong (minimum 5 years) experience in hardware emulation and FPGA environments
• Proven ability to benchmark and profile emulation workloads, interpret performance data, and drive targeted improvements.
• Understanding of emulation and FPGA prototyping workflows, including model build, compile, partitioning, mapping, execution, debug, and regression usage patterns.
• Experience integrating vendor APIs or SDKs into custom automation or monitoring solutions.
• Familiarity with scheduler design and integration.
• Proficiency in Linux-based environments and scripting (Python, Bash) for automation and analysis.
• Strong analytical mentality with a data-driven, test-based approach to performance validation.
• Familiarity with Prometheus, Grafana, or similar metrics frameworks for system visibility.

"Nice To Have" Skills and Experience :

• Experience building workflow orchestration or monitoring tools for large-scale verification environments.
• Exposure to cloud-hosted emulation or elastic compute models.
• Knowledge of EDA tool internals and licensing mechanisms.
• Experience collaborating with EDA vendors on joint optimization or benchmarking initiatives.

Join a collaborative, fast-moving team solving meaningful platform challenges. You'll have room to grow technically, contribute directly to platform strategy, and improve performance for thousands of engineers across Arm.

Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work:https://careers.arm.com/en/10x-mindset

Salary Range:$161,500-$218,500 per year We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.

Arm is the industry’s highest-performing and most power-efficient compute platform with unmatched scale that touches 100 percent of the connected global population. To meet the insatiable demand for compute, Arm is delivering advanced solutions that allow the world’s leading technology companies to unleash the unprecedented experiences and capabilities of AI. Together with the world’s largest computing ecosystem and 22 million software developers, we are building the future of AI on Arm.