ASIC Design Architect

• Synthesize comprehensive micro-architectural specifications from initial conceptual frameworks, transforming high-level client objectives into executable hardware designs.
• Engineer robust security frameworks by integrating hardware-level Root-of-Trust (RoT) and multi-layered cryptographic defenses to ensure systemic integrity.
• Formalize Reliability, Availability, and Serviceability (RAS) protocols, deploying sophisticated error-detection and fault-injection methodologies to harden interconnect fabrics.
• Orchestrate the integration of complex debug and trace subsystems, utilizing advanced ARM-based instrumentation to facilitate deep-silicon visibility and hardware-software co-validation.
• Validate design integrity through rigorous technical reviews and cross-functional alignment, ensuring that the silicon architecture meets the stringent performance and security demands of modern datacenter environments.
• Deploy technical leadership in client-facing technical deep-dives, acting as the primary engineering liaison to refine specifications and ensure the successful delivery of custom ASIC solutions.

• Academic Foundation: A minimum of a Bachelor of Science in Electrical Engineering (BSEE) is required, though an MSEE or higher is preferred to match the theoretical depth of the role.
• Silicon Lifecycle Mastery: Extensive experience (10-25 years) in the front-end ASIC/SoC development lifecycle, with a proven history of taking complex designs from initial “clean sheet” specifications through successful tape-out.
• Security & ARM Ecosystem Expertise: Deep technical fluency in ARM-based architectures, specifically regarding TrustZone implementation, Memory Management Units (MMU/MPU), and the deployment of secure boot sequences and tamper-detection mechanisms.
• Debug & Instrumentation Proficiency: Advanced knowledge of standard trace and debug architectures, including the configuration of external debug interfaces and software-to-hardware diagnostic tools.
• Systemic Resilience: Demonstrated success in implementing error-reporting and fault-management systems within high-performance fabrics.
• Operational Agility: A professional background characterized by stability and the ability to operate autonomously within high-impact, small-team structures where individual technical contributions directly dictate project success.

***Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position., StaffRight Associates has been retained to lead an exclusive search for a Senior ASIC Design Architect to spearhead the development of custom, high-performance silicon for next-generation compute environments. This role is not merely about RTL implementation; it is a mission-critical position focused on the structural alignment of security-hardened architectures and complex System-on-Chip (SoC) ecosystems.