Cryptography Engineer

We are seeking an experienced Digital Design Engineer to work on a high pay OUTSIDE IR35 Contract opportunity. The client need an engineer with strong expertise in the hardware implementation of cryptographic algorithms for ASIC and FPGA platforms. This role is focused on designing, optimizing, and validating high-performance cryptographic accelerators and security IP for next-generation secure connected devices.

You will work on translating complex cryptographic algorithms into efficient hardware architectures, balancing performance, area, power, and security requirements. Working closely with architecture, verification, and embedded software teams, you will play a key role in delivering silicon-proven cryptographic solutions for security-critical applications.

What You’ll Be Doing

• Design and implement cryptographic hardware accelerators and security IP blocks for ASIC and FPGA environments.
• Develop RTL implementations of cryptographic algorithms including AES, SHA, ECC, RSA, Post-Quantum Cryptography (PQC), and True Random Number Generators (TRNGs).
• Architect and optimize cryptographic datapaths, control logic, and memory interfaces to meet demanding area, power, throughput, and latency targets.
• Evaluate and implement hardware countermeasures against side-channel attacks, fault injection, and other hardware security threats.
• Perform microarchitecture design, RTL development, simulation, synthesis, timing closure, and hardware validation of cryptographic subsystems.
• Analyze algorithmic requirements and translate cryptographic specifications into efficient hardware implementations.
• Work closely with verification teams to develop robust test strategies and ensure compliance with security and functional requirements.
• Contribute to security architecture decisions and the development of reusable cryptographic IP.
• Develop Python-based tools and automation to support verification, performance analysis, and design optimization.
• Support ASIC implementation activities including synthesis, static timing analysis (STA), design-for-test (DFT), and silicon bring-up.

• 5+ years of industry experience in digital hardware design, secure silicon development, or cryptographic hardware implementation.
• Strong practical experience implementing cryptographic algorithms in hardware, including symmetric and asymmetric cryptography.
• Demonstrated expertise developing RTL for algorithms such as AES, SHA-2/SHA-3, RSA, ECC, or other cryptographic primitives.
• Experience optimizing cryptographic hardware for throughput, latency, silicon area, and power consumption.
• Strong understanding of hardware security concepts and secure implementation techniques.
• Proficiency in Verilog and/or VHDL development.
• Experience with ASIC and FPGA design flows from architecture through implementation.
• Solid understanding of RTL design, simulation, verification, and testbench development.
• Experience with synthesis, timing analysis, and hardware debugging.
• Strong analytical and problem-solving skills with the ability to evaluate architectural trade-offs in cryptographic hardware designs., * Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, Cryptography, or a related field.
• Strong understanding of digital design principles, hardware architecture, and cryptographic implementation techniques.
• Experience using Python or similar scripting languages for automation and verification.
• Ability to work effectively in a collaborative engineering environment.

Nice to Have

• Experience implementing Post-Quantum Cryptography (PQC) algorithms in hardware.
• Knowledge of elliptic curve cryptography, lattice-based cryptography, and modern cryptographic acceleration techniques.
• Experience designing secure cryptographic IP for Root of Trust, Secure Elements, HSMs, or Secure Boot applications.
• Familiarity with side-channel analysis, fault injection testing, and hardware security evaluation methodologies.
• Experience with formal verification and security-focused validation flows.
• Exposure to RISC-V processors and secure system-on-chip architectures.

• Opportunity to work on advanced cryptographic hardware and secure silicon technologies.
• Significant influence over architecture, implementation strategies, and IP development.
• Collaborative engineering culture with high levels of ownership and autonomy.
• Exposure to cutting-edge ASIC, FPGA, and hardware security projects.
• Competitive salary, benefits, and long-term career growth opportunities.