FPGA / Digital Design Engineer

Description: Plans, performs, and executes engineering research and design development for both new products and existing products. Performs design/HDL analysis, including high speed and low power design. Participates in testing and integration tasks. Takes algorithmic or functional specifications and coverts that to a design that can be implemented for use in lab or field tests. Develop models, simulate and verify designs, fabricate prototypes, and test hardware solutions. Creates and maintains accurate and detailed design files. Candidate should possess experience in electrical engineering. Digital HDL design experience is required, including complex, high-speed HDL based implementations of algorithms targeting programmable logic devices (PLDs, FPGA, ASIC, etc.), microprocessors, DSP, and/or ARM processors. Hands-on experience with code design, simulation and testing is required.

1. Strong VHDL (preferred)/Verilog firmware development experience to include VHDL development, simulation, synthesis, and timing closure A skills test will be given to potential candidates
2. Strong experience with Xilinx FPGAs, Zynq SoC architectures, and Vivado
3. Experience with Rapid software prototyping VHDL code
4. Experience with scripting languages (TCL, Bash, Python, etc)
5. Experience with lab equipment (oscilloscopes, logic analyzers, etc)
6. Experience with revision control (GIT)
7. Experience with embedded SoC architectures (DSP + ARM) and embedded software (DMA interface, etc)
8. Strong MATLAB analysis skills tailored to wireless digital communications and using it as a golden model
9. Experience implementing DoD waveforms
10. Signal processing experience, in particular turbo encoders and decoders

Preferred Skills:

1. Strong understanding of fundamentals of wireless digital communications systems and all PHY processes from data in to baseband I/Q out Be able to clearly articulate the function of all digital blocks in a typical communications chain (encoders, modulators, correlators, etc.). Preference will be given to candidates who have implemented and deployed real systems
2. Experience integrating FPGA code into infrastructure and hardware to include JESD-204B interfaces.

Education:

• Bachelor’s degree required.