Hardware/Software Design Engineer

• Implement DSP and associated technical components in FPGA for code base integration.

• Strong experience required for FPGA coding, Digital Signal Processing theory & application, Interfacing FPGA code with existing code bases and software.
• Knowledge of signal processing blocks and related DSP components, Linux OS, coding ability in C and C++.
• Bachelor’s degree plus 8-years of relevant experience or equivalent.

Preferred Qualifications

• Additional experience with Vivado required.
• Experience with Epiq Solution PDK preferred., Clearance Requirement: This position requires an active TS/SCI with a polygraph.

Candidate Referral: Do you know someone who would be GREAT at this role? If you do, ARSIEM has a way for you to earn a bonus through our referral program for persons presenting NEW (not in our resume database) candidates who are successfully placed on one of our projects. The bonus for this position is $5,000, and the referrer is eligible to receive the sum for any applicant we can place within 12 months of referral. The bonus is paid after the referred employee reaches six months of employment.

At ARSIEM Corporation we are committed to fostering a proven and trusted partnership with our government clients. We provide support to multiple agencies across the United States Government. ARSIEM has an experienced workforce of qualified professionals committed to providing the best possible support.

As demand increases, ARSIEM continues to provide reliable and cutting-edge technical solutions at the best value to our clients. That means a career packed with opportunities to grow and the ability to have an impact on every client you work with.

ARSIEM is looking for a an experienced Senior HW/SW Design Engineer to join a small team to design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems. This position requires expertise in FPGA development, digital signal processing implementation, and software-hardware integration to support mission critical requirements. The contractor will lead technical design efforts, implement DSP algorithms and associated technical components in FPGA hardware, integrate with existing Linux code bases, bridge FPGA to software stack connection, plus document those efforts. This role combines hardware design responsibilities (FPGA RTL development, timing closure, resource optimization) with software development (integration code, system-level software) to deliver complete subsystem solutions. This position will support one of our government clients in Annapolis Junction, MD.