R+D Firmware Engineer III

This role will demonstrate a high level of expertise in firmware development. Responsible for leading firmware projects, this role will provide technical guidance to junior engineers, participate in architectural decisions, and contribute to the improvement of development processes. This role requires a solid understanding of embedded systems, proficiency in coding and debugging, and the ability to solve complex problems independently. This role is a hybrid role with 4 days on-site in the Versailles or Cincinnati, Ohio locations and one day remote.

ESSENTIAL/PRIMARY DUTIES:

• Develops, debugs, and tests complex firmware for a wide variety of processor architectures.
• Troubleshoots and resolves firmware-related issues.
• Contributes to the architecture and design of firmware systems.
• Develops comprehensive testing strategies.
• Validates firmware functionality and performance.
• Collaborates with cross-functional teams to align decisions with business goals.
• Acts as team contributor with some technical leadership, provides guidance, anticipates, and prevents issues.
• Plans, implements, and optimizes complex solutions, leads design and development of medium-sized projects.
• Applies advanced tools and methods to solve complex problems. Tackles technical challenges and contributes to troubleshooting effort.
• Contributes to IP creation. Understands and navigates IP considerations when working with partners.

SECONDARY DUTIES:

• Participates in code reviews of junior engineers.
• Develops and maintains custom tools to support firmware development.
• Brings up new hardware designs in the lab independently.
• Interfaces with cross-functional teams to help define requirements and iterate designs through final release and verification testing.
• Leads or participates in process redesign, defines KPIs, leads change management.
• Applies domain expertise to the application and advancement of engineering methods and tools., * Provides leadership, coaching, and/or mentoring to level I and level II engineers.

Bachelor’s degree in computer science, software engineering, electrical engineering or related field and 4+ years of relevant experience, or equivalent combination of both.

Midmark will only employ those who are legally authorized to work in the United States. This is not a position for which sponsorship will be provided. Individuals with temporary visas or who will need sponsorship for work authorization now or in the future, are not eligible for hire.

COMPETENCY and/or SKILL:

• Deep knowledge of microcontroller and microprocessor architectures, RTOS and bare-metal design, BSPs, and bootloaders.
• Demonstrated ability to define and evolve modular firmware architectures, interfaces, and technical roadmaps while balancing safety, reliability, performance, power, cost, and maintainability.
• Ability to create object libraries, applications, daemons, and drivers deployed inside embedded hardware devices
• Experience with tools like Jenkins or Travis CI for automated testing and deployment.
• Hands-on expertise with wired and wireless embedded systems, including Bluetooth Low Energy (BLE) architecture, CAN, power optimization, and RF coexistence.
• Proficiency with version control tools like Git
• Advanced proficiency in embedded C/C++ and low-level development for resource-constrained, real-time systems. Other language experience in Python, Jave or similar languages is desired.
• Experience designing custom wireless communication protocols and data models that are efficient, testable, versioned, backward-compatible, and resilient to unreliable links.
• Ability to establish scalable verification practices, including unit, integration, system, and hardware-in-the-loop testing; automated CI pipelines; code reviews; and requirements traceability.
• Proven technical leadership through architecture and design reviews, cross-functional communication, sound risk-based decisions, and coaching and mentoring of less-experienced engineers.
• Working knowledge of secure and reliable firmware practices, including applicable C/C++ coding standards, threat- and risk-informed design, secure boot and update mechanisms.
• Debugging, root-cause analysis, and structured problem solving across firmware, hardware, and wireless boundaries using JTAG/SWD, oscilloscopes, logic analyzers, packet sniffers, and traces.