FPGA Engineer

3brain
Germany
about 1 month ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Working hours
Regular working hours
Languages
English
Job source

Tech stack

C++ (Programming Language) Computer Programming Data Transmissions Linux Embedded Software Ethernet Field-Programmable Gate Array (FPGA) Hardware Description Language PCI Express Signal Processing SystemVerilog Systems Integration
+11 more
Universal Asynchronous Receiver/Transmitter USB Verilog VHSIC Hardware Description Language (VHDL) Vivado Digital Access Carrier System Serial Peripheral Interface Real Time Systems Fpga Hardware Peripherals Hardware Acceleration

Job description

3Brain is looking for a full-time Senior FPGA engineer to reinforce our R&D team. You will help develop new embedded systems for high-speed data acquisition devices and improve and maintain the existing product line. You will be responsible for fetching data from high speed ADCs or to stream to high-speed DACs. You will design IP cores for complex signal processing and hardware accelerators. You will also provide the necessary FPGA infrastructure to communicate with hardware peripherals (SPI, UART, I2C, etc.). \n

In particular, your tasks involve: \n \n

  • Developing FPGA projects with Intel Quartus and Xilinx Vivado.\n
  • Designing FPGA modules for high-speed data acquisition (Gbps-rate LVDS), data transmission (USB, Ethernet, PCIe, CameraLink), and real-time processing using HDL (VHDL, Verilog, SystemVerilog), supported by self-checking testbenches.\n
  • Integrating FPGA modules for peripheral control (SPI, UART, I2C, etc.).\n
  • Embedded software development for FPGA (C/C++/Linux).\n
  • Maintenance of the existing code base.\n

Requirements

  • BSc/MSc in Electrical Engineering or similar.\n
  • 5 Years or more of experience in FPGA development and HDL coding.\n
  • FPGA development tools such as Intel Quartus or Xilinx Vivado.\n
  • FPGA timing constraints with Synopsys Design Constraints (.sdc).\n
  • Knowledge of embedded systems/systems on chip.\n
  • Commitment to high coding and design standards and best practices.\n
  • Basic understanding of electronics.\n
  • Fluency in English.\n
  • Initiative and independence.\n, * PhD in Electrical Engineering or similar.\n
  • Project/people management skills.\n
  • Proficiency with VHDL-2008, OSVVM, UVVM, VUnit.\n
  • Proficiency in embedded software programming C/C++.\n
  • Knowledge of the Linux operating system for embedded devices.\n
  • Proficiency in Python programming.\n
  • Background in signal processing.\n

Benefits & conditions

  • A dynamic and stimulating work environment driven by a desire to build transformational technologies to help others.\n
  • A young, fast-growing company with plenty of opportunities for personal growth and development.\n
  • Great challenges and adventures in both technical and economical fields.\n
  • Working place: Pfäffikon SZ, Switzerland. It is a beautiful lakeside village just outside of Zurich, the country’s main cultural, financial and business center.\n

\n

About the company

3Brain is a Swiss deep tech company working on cell-electronic interfaces that link biological networks to computers via custom-made semiconductor microchips. Our mission is to empower life scientists to probe intelligent networks, accelerate biomedical discoveries for the benefit of patients, and create a future more exciting than the present. Our interdisciplinary team of scientists and engineers are constantly pushing the boundaries of engineering for life’s complexities. We are ambitious, fast-growing and love to explore. The company’s cutting-edge products are used in laboratories and pharma companies worldwide. 3Brain is headquartered in Switzerland nearby Zurich, has a Discovery Unit and production site in Genova, Italy, and an operational unit in the US.

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