Software Engineer
Esvee Technologies Inc
Austin, TX, United States
5 days ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Job source
Tech stack
C++ (Programming Language)
Software Debugging
Linux
Logic Synthesis of Circuits
Perl (Programming Language)
Field-Programmable Gate Array (FPGA)
Python (Programming Language)
PCI Express
Quick EMUlator (QEMU)
SystemC
SystemVerilog
Requirements
- Digital design with system verilog RTL coding from Synthesis point of view..
- Experience with emulator ZeBu, Palladium & Veloce.
- FPGA Pro typing experience with HAPS, Protium & ProFPGA is plus.
- Ability to put together emulation top level wrapper with DUT/System Level, clocks/reset & FPGA partitioning/Place & Route timing closure for successful model build.
- Knowledge of Python, C/Perl scripting is a must.
- Expertise in HW assisted Verification Test Bench environment : UVM, C++/System C is desired.
- Experience integrating and bringing up PCIe Gen6 Protocol Transactor Integration with QeMu is required.
- Kernel boot, Linux Boot sequences knowledge & debug is must.
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