Field-Programmable Gate Arrays Engineer

SGI is supporting an international engineering organisation developing advanced FPGA technology for high-performance electronic systems used across communications, aerospace, scientific research, industrial applications and next-generation computing.This is a hands-on development role focused on designing and implementing FPGA functionality for complex multi-FPGA platforms.You’ll work as part of a globally distributed R&D team, collaborating with software, hardware and systems engineers to develop, integrate, verify and deliver FPGA solutions within commercial products.You will be required on-site 2 days p.w ResponsibilitiesDesign, develop and maintain FPGA functionality usingSystemVerilog .Perform FPGA simulation, synthesis, implementation, timing closure and hardware validation.Debug and resolve complex issues across FPGA, firmware, hardware and software environments.Collaborate with multidisciplinary engineering teams throughout the full product development lifecycle.Support integration, verification and release of FPGA designs within complex embedded systems.Required ExperienceDegree in Electrical Engineering, Computer Engineering, Computer Science or a related discipline.Experience designing FPGA functionality formulti-FPGAor other complex FPGA-based systems.Proven experience with simulation, synthesis, implementation and timing closure.Hands-on experience withXilinx FPGAsand theVivadotoolchain.Strong understanding of digital design principles, including: Clock Domain Crossing (CDC) Timing analysis Memory architectures FPGA interfaces Experience debugging FPGA designs within larger hardware and embedded system architectures.Experience usingGitand collaborative development workflows.Strong communication skills with the ability to work effectively in international engineering teams.#J-*****-Ljbffr

Degree in Electrical Engineering, Computer Engineering, Computer Science or a related discipline. Experience designing FPGA functionality for multi-FPGA or other complex FPGA-based systems. Proven experience with simulation, synthesis, implementation and timing closure. Hands-on experience with Xilinx FPGAs and the Vivado toolchain. Strong understanding of digital design principles, including: Clock Domain Crossing (CDC) Timing analysis Memory architectures FPGA interfaces Experience debugging FPGA designs within larger hardware and embedded system architectures. Experience using Git and collaborative development workflows. Strong communication skills with the ability to work effectively in international engineering teams. #J-*****-Ljbffr