Senior FPGA Engineer

A deep-tech company developing large, low-latency compute systems is looking to bring an FPGA Engineer into its hardware team to help deliver that challenge. Rather than focusing on isolated IP blocks, you’ll be contributing to a multi-FPGA platform where throughput, latency, and predictability are critical. The work spans architecture, optimisation and implementation, with a strong emphasis on designing systems that behave consistently under heavy load. In this role, you’ll design and optimise deeply pipelined RTL, pushing clock frequency while managing area and latency trade-offs. You’ll collaborate closely with software engineers and system architects, review and guide the work of more junior engineers, and help shape how complex requirements are translated into robust hardware designs. The environment is highly collaborative and fast-moving, with an expectation that engineers contribute ideas, challenge assumptions, and continuously refine the system. They are looking for an FPGA Engineer with the following background

Strong experience with modern FPGA platforms (e.g. AMD/Xilinx or Intel/Altera devices) RTL coding experience in VHDL, Verilog, or SystemVerilog Background in building or optimising large, complex FPGA or ASIC systems Experience with high-performance, low-latency or deeply pipelined architectures Proven ability to test, debug, and improve system-level behaviour Comfortable translating product-level requirements into clear technical specifications Experience with SoC architectures, accelerator-based systems, or ASIC-style environments would be beneficial, but is not essential.