Principal Engineer for Platform Architecture

Infineon Technologies AG
Frankfurt am Main, Germany
4 days ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Working hours
Shift work

Tech stack

Computer Programming Multiprocessing Subsystems Systems Architecture SystemC PIC Microcontroller Low Latency Automotive Software Software Usability

Job description

technical risk management for all areas of the SoC architecture. Derive requirements from application assumptions, stakeholder requirements, and system architecture proposalsDefine and drive feasibility studies. Evaluate solution impacts on cost, performance, power, and software usability. Conduct performance, power, and area (PPA) analyses and optimizationsTechnically guide a community of component architects, designers, physical implementation, and verification engineers to ensure feature and performance fulfillment, as well as efficient physical implementation of the proposed solutionsEnsure the consistency and implementability of our architectures while driving the decision-making process among stakeholders from technical marketing, project owners, and development teamsProactively drive innovation in the area of microcontroller platform and SoC architecture based on a profound understanding of future product needs and industry trendsAct as a mentor and foster talent, including

Requirements

collaboration with universitiesYour ProfileQualifications and skills to help you succeedAt least 15 years of experience in technical roles in the area of SoC architectures and design and/or implementation in leading-edge semiconductor technology nodesProfound understanding of high-performance SoC architectures for low-latency, real-time applicationsHands-on experience with multi-core subsystems, interconnects, and memory hierarchiesExperience with architecture exploration and Performance, Power, and Area (PPA) estimationHands-on proficiency in modelling (SystemC, RTL, MBSE) and analytical tooling (programming, simulators, tracing), with the ability to define and scale new methodologies, enabling data-driven architecture strategy for complex and novel system challengesKnowledge in power management and low-power techniques. Automotive domain knowledge is an essential plus, especially regarding microcontroller and processor architectures for automotive applications. Functional Safety and Security knowledge (e.g., experience with development according to ISO 26262 or ISO 21434) is also a plus.Excellent technical leadership capabilities combined with strong communication skills and the ability to work in cross-functional teams within a multicultural environmentContact: Bruna Fernandes, LinkedIn#WeAreIn for driving decarbonization and digitalization.As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.Are you in?We are on a journey to create the best Infineon for everyone.This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and

About the company

#WeAreIn for jobs that impact everyone's life. Join the thinkers, builders, and problem-solvers behind tomorrow's technology. As a Senior Principal Engineer for Platform Architecture in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?Your RoleKey responsibilities in your new roleLead the definition of the SoC architecture for our next-generation microcontroller platform. You will define scalable architecture solutions for our microcontroller products, including multiple compute clusters, external memory interfaces such as LPDDR, gigabit-speed communication links, and application-specific accelerator subsystems (AI, graphics), all of which have ambitious area, performance, and power targetsOwn product requirements and

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