ASIC Engineer

Working within a team, the Senior ASIC Engineer will take responsibility for block-level and chip-level design for custom ASICs. This will include from concept to production of the silicon and will involve design specification, architectural development, top-level design and digital / mixed-signal simulation, layout and sign-off. You will work with modern EDA tools, and develop behavioural models of mixed signal designs. You will document all IC designs and associated work.

• Degree in Electronics Engineering (or similar), and possibly a related PhD.
• Industry experience working on digital / mixed signal circuit design including SoC architecture, RTL design (VHDL or Verilog), SystemC and MATLAB.
• Experience with EDA tools for design, verification and implementation of chip-level circuits and simulations.
• Experience with ARM processors, bus protocols, and processor subsystems.
• Exposure to touch-screen technologies or piezoelectric devices would be desirable.

On offer is a competitive salary and benefits package. Applications for those who are immediately available or on notice periods will be considered.