VLSI RTL Design Engineer

AMD’s Cores Organization delivers industry leading CPU’s, Caches, and Chiplets that are the foundation of AMD’s server, client, and gaming business. We are looking for an experienced VLSI RTL design engineer to join this innovative team. In this role, the candidate will invent and implement the highest performance, most energy efficient cache and fabric designs in the industry. The candidate will have the potential and will develop to be a key contributor and leader for AMD’s next generation cores and caches. The candidate will join the team based in Fort Collins, CO, * Collaborate with Cache and CPU Architects to design, document, and execute optimized high-performance Cache and Routing Fabric designs.

• Collaborate with Physical Design to develop RTL that is optimized for physical construction and timing closure.
• Collaborate with Design Verification to develop architecture and features that are documented clearly and are verifiable.
• Collaborate with Design For Test teams to develop RTL that is reliable, testable, and manufacturable.
• Work across global teams to solve complex architectural interactions between IP and SOC designs
• Develop ways to improve our CPU design by increasing quality, by simplifying design complexities through innovation, and by improving our technical interactions with other teams
• Solve design and tool problems requiring ground-breaking approaches and champion innovation across the organization. Create technical presentations for peers and management., AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

We are pushing the envelope on chip performance, so the status quo must be challenged on every program. This environment requires creativity and innovation, but also excellent verbal and written communication skills. The candidate has strong analytical thinking and problem-solving skills and enjoys using those skills to accomplish goals that many might not think possible. The candidate is a multiplier and has experience fostering collaboration across a broad spectrum of team boundaries., * Prior SRAM, Coherent Cache or interconnect/NOC RTL design experience

• Prior experience with Digital RTL Design, Verilog HDL, Software Development, and Scripting, * BS/MS in EE, CS, CSE (or similar), plus 3+ years hardware design experience

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger- technologythat moves the world forward.Join us and, together, we’ll advance your career.