Digital ASIC Design Engineer
IC Resources
Barcelona, Spain
about 2 months ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Compensation
β¬90,000.0 - β¬130,000.0
Working hours
Regular working hours
Job source
Tech stack
Field-Programmable Gate Array (FPGA)
SystemVerilog
Application Specific Integrated Circuits
Requirements
The role requires strong experience in ASIC/FPGA design, UVM environments, and SystemVerilog for IP/SOC designs. Visa sponsorship and relocation support are offered if needed.
Apply for this position
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Prepare application
- Draft this with your agent
- Open in Claude
- Open in ChatGPT
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