SoC Architect

• No endless meetings, no PowerPoint presentations to convince middle management., * Define system architecture for complex SoCs, including IO, compute, interconnect and subsystems

• Drive architecture for scalable and modular designs, including chiplet-based systems (UCIe)

• Architect high-performance data movement across IO interfaces ( PCIe / UCIe / CXL / UALink / ESUN )

• Collaborate with design and DV teams to ensure architectural feasibility and efficient implementation

• Develop performance models and simulations to validate architecture choices

• Drive trade-offs across: Performance, Power, Area and Cost

• Work closely with customers and software teams to align architecture with real-world workloads

• Influence long-term roadmap and technology direction
• Define system-level verification and validation strategies

If you’re reading this, you’re probably comfortable. You have a good job at a stable company with all the benefits., * Bachelor’s/Master’s/PhD in Electrical Engineering, Computer Engineering, or related field

• 18+ years of experience in SoC or system architecture

• Proven track record of architecting complex SoCs for AI, HPC, or Networking

• Deep understanding of:

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• System-level design and trade-offs

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• High-speed IO protocols (UCIe, PCIe, Ethernet)

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• Data movement and interconnect design

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• Experience with performance modeling and architectural simulation

• Strong cross-functional collaboration skills

Preferred Qualifications

• Knowledge of coherency protocols (CXL, CHI.)

• Experience with power/performance optimization at system level

• Exposure to software-hardware co-design

• Experience with memory architectures (DDR, HBM, cache hierarchies)

• Familiarity with chiplet architectures and advanced packaging (2.5D/3D)

Key Attributes

• Strong system-level thinking and architectural vision

• Ability to balance innovation with practical execution

• High ownership and accountability

• Strong communication and leadership skills

Success Metrics

• Scalable and efficient SoC architectures across multiple generations

• Achievement of performance, power, and cost targets

• Strong alignment between architecture and silicon outcomes

• Reduced architectural rework through early validation

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?

That’s what we solve. TylSemi builds the chiplet infrastructure IP - the IO, power delivery, and interconnect building blocks - that makes AI/HPC systems actually work at scale.