Quantitative Developer - HFT

• 3+ years of experience in performance-critical C++ (C++17 or newer)
• Strong grasp of systems programming, low-level understanding including memory management and CPU’s architectures
• Deep familiarity with Linux internals, kernel parameters, and low-level profiling
• Curiosity about hardware, networking, and how systems behave under real load

QRT is an equal opportunity employer. We welcome diversity as essential to our success. QRT empowers employees to work openly and respectfully to achieve collective success. In addition to professional achievement, we are offering initiatives and programs to enable employees to achieve a healthy work-life balance.

FULL_TIME Organization https://startup.jobs/logos/40532 Qube Research & Technologies None Startups Place

Qube Research & Technologies (QRT) is a global quantitative and systematic investment manager, operating in all liquid asset classes across the world. We are a technology and data driven group implementing a scientific approach to investing. Combining data, research, technology and trading expertise has shaped QRT’s collaborative mindset which enables us to solve the most complex challenges. QRT’s culture of innovation continuously drives our ambition to deliver high quality returns for our investors.

QRT’s High-Frequency Trading team designs and operates ultra-low-latency systems that run at global scale. We’re looking for experienced C++ engineers who care deeply about performance, efficiency, and the elegance of ultra-optimized systems.

Your future role at QRT:

You’ll work across our latency-critical stack - from kernel-level tuning and network optimization to highly efficient C++ components. This role involves close collaboration with our FPGA engineering team as well as our hardware and infrastructure engineers to design end-to-end architectures where every single nanosecond counts.

• Design and optimize C++ systems for trading, market data, and infrastructure
• Profile and fine-tune performance across CPU, cache, and memory layers
• Collaborate with FPGA engineers to integrate hardware and software pathways