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Senior FPGA Engineer: Ultra-Low Latency Trading Systems

DV Trading
Greater London, UK
14 days ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Working hours
Regular working hours
Job source
www.collegerecruiter.com

Tech stack

Algorithmic Trading Firmware Field-Programmable Gate Array (FPGA) SystemVerilog Low Latency

Requirements

DV Trading LLC is seeking a Senior FPGA Engineer to join their semi-systematic equities team in Greater London. The successful candidate will architect and deliver ultra-low-latency FPGA trading systems that drive the firm’s competitive edge in global equity and futures exchanges. This role involves leading a team, designing high-throughput FPGA firmware, and optimizing hardware for performance. Applicants should have over 5 years of FPGA design experience and expertise in SystemVerilog. The company offers an inclusive work environment. #J-18808-Ljbffr

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Good distractions

Talks and stories from around this role — technically off-topic, practically not.

Moments

Explore playlists

5:48 min

Balancing delivery latency with stream reliability and scale

Phil Cluff · LIVE

2:19 min

Orchestrating over-the-air firmware updates for vehicle modules

Denis Grahovac · World Congress 2021

1:45 min

Building IT systems for global finance markets

Anastasia Troitskaya Anastasia Troitskaya · World Congress 2024

3:37 min

Accessing API documentation and testing remote driving latency

Alexandru Ciinaru Alexandru Ciinaru +3 · World Congress 2025

2:20 min

Utilizing custom firmware for variable torque manipulation

Daniel Meilak Daniel Meilak +1 · World Congress 2026 Europe

1:12 min

Addressing the competitive landscape of specialized hardware demands

Hazal Mestci +1 · Coffee With Developers

Videos

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19:13
World Congress 2024 • about 2 years ago

Microservices architecture as a key element in building trading systems for global finance markets

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22:32
World Congress 2023 • almost 3 years ago

Swapping Low Latency Data Storage Under High Load

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18:27
World Congress 2026 Europe • 3 months ago

Playing Pong on a shoulder press machine

Daniel Meilak, Enris Nogare von Tein

Resilient by Design: Building Robust Architectures in High-Stakes Financial Systems thumbnail
38:32
Europe 2026 Virtual • 3 months ago

Resilient by Design: Building Robust Architectures in High-Stakes Financial Systems

Lyubomir Bozhinov

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22:18
World Congress 2025 • about 1 year ago

Unleash the power of 5G in your code: transform your apps

Alexandru Ciinaru, Mark Cornall, Noel Wirzius, Sameer Jain

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World Congress 2026 Europe • 2 months ago

Agent Smith Gets Hardware: Autonomous IoT Hacking From Debug Port to Cloud API

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