Senior Fpga Engineer

Exceltic
Madrid, Spain
10 days ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience required
7 years minimum
Working hours
Regular working hours

Tech stack

Field-Programmable Gate Array (FPGA) Verilog VHSIC Hardware Description Language (VHDL) Vivado

Job description

Buscamos un Ingeniero FPGA Senior con más de 7 años de experiencia para liderar la arquitectura, diseño y verificación de sistemas FPGA complejos en Madrid.Se requiere dominio de VHDL/Verilog, Vivado/Quartus y experiencia en interfaces de alta velocidad.

Requirements

Se requiere dominio de VHDL/Verilog, Vivado/Quartus y experiencia en interfaces de alta velocidad.

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Good distractions

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