IP Validation Engineer - Machine Learning Accelerators

Reality Labs focuses on delivering Meta’s vision through On-device AI. The compute performance and power efficiency requirements of these workloads require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, displays and sensors. Our chips enable On-device AI assistance and personal superintelligence features, contextualized to timing and personalized requirements. We believe the only way to achieve our goals is to look at the entire stack, from transistors to architecture, firmware, and algorithms.As a Machine Learning IP Validation Engineer at Meta Reality Labs, you will use your hardware/software integration, prototyping, emulation, firmware, and hardware validation skills to develop IP validation infrastructure; bring up, validate, and optimize ML workloads across pre-silicon and post-silicon platforms; and improve the functionality, performance, power, and robustness of state-of-the-art ML accelerators. You will partner cross-functionally with RTL design, verification, emulation, architecture, ML compiler, firmware/runtime, and ML model teams to define validation requirements, debug cross-layer issues, and drive them to resolution., 1. Define and execute HW-SW integration, functional validation, and characterization plans for ML accelerator IP across emulation, prototyping, and silicon platforms

1. Identify risks and develop mitigation strategies
2. For new technologies and features, work closely with design engineering on defining performance-power characterization and validation strategy, as well as detailed test plans
3. Participate in design reviews and make recommendations to support overall test strategy
4. Create test setups, collect and analyze data to help debug technical issues
5. Partner with RTL design, design verification, emulation, SoC architecture, ML compiler, firmware/runtime, and system teams to bring up ML workloads, identify root causes, drive cross-layer issues to resolution, and verify fixes
6. Convert large amounts of data into a clear summary to communicate to stakeholders at all levels

1. 8+ years of relevant experience in consumer electronics or related fields
2. Experience creating validation plans for hardware products including developing test methodologies for new features and technologies
3. Experience with HW-SW integration and validation of ML accelerators or related programmable compute IP, including workload bring-up, functional debug, performance characterization
4. Familiar with testing common SOC HW interfaces such as AXI, APB, AHB, OCP
5. Experience in troubleshooting with component vendors on test escapes, missing test coverage, etc, 13. Demonstrated experience supporting technical teams, cross-functional groups and vendors to execute against validation plans
6. Demonstrated understanding of consumer electronics product lifecycle, development process and partner eco-system
7. Experience working with embedded systems that run on RTOS/Android/Linux
8. Scripting experience for test automation and data processing/organization
9. Experience with ML frameworks, compilers, runtimes, or model-deployment workflows, including profiling or optimizing ML workload performance, data movement, memory behavior, or power
10. Proven communication and collaboration skills and experience communicating and driving issues to resolution across cross functional teams
11. Experience working with overseas development and manufacturing partners
12. Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
13. Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
14. Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies