Senior Hardware Design Engineer, Platforms

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Our Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power all of Google’s services. Our computational challenges are complex and unique, enabled by custom hardware designed and made in-house.

As a hardware design engineer, you will focus on electrical and PCBA design, you will develop the board-level electrical architectures and circuit board assemblies that serve as the foundation of Google’s data center computing and AI infrastructure. You will see those systems from early concept and schematic capture through layout, lab bring-up, validation, and high-volume manufacturing. Your work has the potential to shape the machinery that goes into our data centers, directly affecting billions of users.

Our Platforms Infrastructure Engineering team designs and builds the

hardware and software technologies that power all of Google’s services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of Google users.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $159000 - $230000 (USD) + 15% bonus target + equity + benefits, * Own end-to-end board-level electrical design, including component selection, detailed schematic capture, bill of materials creation, and circuit analysis.

• Define PCB stackup requirements, layout placement guidelines, and routing constraints in close partnership with PCB layout engineers.
• Collaborate with signal integrity and power integrity engineers to implement high-speed serial/parallel buses and power delivery networks.
• Lead board bring-up, functional validation, hardware debugging, and electrical characterization in the lab using high-speed test equipment.
• Work cross-functionally with Silicon/ASIC, Mechanical, Thermal, Firmware, Diagnostics, and Safety teams to deliver integrated system solutions. Partner with contract manufacturers and suppliers to resolve design for manufacturing and design for test challenges during NPI builds.

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area., * Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

• 4 years of experience in hardware development, board-level electrical design, and multilayer PCBA implementation.
• Experience with schematic capture and PCB layout review using industry-standard tools (e.g., Cadence Concept, OrCAD, Allegro, or Altium).
• Experience in lab bring-up, hardware debugging, and electrical validation using oscilloscopes, logic analyzers, and multimeters., * Master’s or PhD degree in Electrical Engineering, Computer Engineering, Physics, or a related field.
• 5 years of experience designing complex, high-density server, storage, networking, or AI/ML accelerator PCBAs.
• Experience with power management topologies, point-of-load (POL) regulators, PMBus/I2C telemetry, and power sequencing design.
• Experience with high-speed digital interfaces (PCIe, DDR/LPDDR, Ethernet SerDes) and SI/PI co-design principles.
• Experience supporting New Product Introduction builds and driving DFM/DFT improvements with manufacturing partners.
• Ability to collect, organize, and present complex experimental data to isolate root causes of electrical anomalies.

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