Digital Engineer 3

CHIPTON ROSS
San Diego, CA, United States
3 days ago
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Role details

Contract type
Temporary contract
Employment type
Full-time (> 32 hours)
Experience level
Experienced
Experience required
3 years minimum
Working hours
Regular working hours

Tech stack

Agile Methodology Systems Engineering Communications Protocols Software Debugging Software Design Documents Programming Tools Digital Arts Electronic Design Automation Ethernet Firmware Field-Programmable Gate Array (FPGA) PCI Express
+7 more
System on a Chip Universal Asynchronous Receiver/Transmitter VHSIC Hardware Description Language (VHDL) Vivado Serial Peripheral Interface SC Clearance Software Defined Radio

Job description

Chipton-Ross is seeking a Digital Engineer 3 for a contract opportunity in San Diego, CA., Design, develop, integrate and test VHDL-based digital designs for our end-user customers and businesses, primarily focused on software defined radio VHDL firmware code bases. Work using FPGA programming development tools and environments Work with multi-disciplinary teams, such as with Systems Engineering, Digital Engineering, Hardware, and Integration & Test Work in waterfall or Agile software development environment Analyze system concept of operation, requirements and design documents to resolve functional, performance or timing issues.

Requirements

BS + 5 years of experience in related STEM field; MS + 3 years of experience. Significant hands-on current experience in the field of VHDL design. Candidate must have excellent written and communication skills and be able to work independently and within groups. Candidate must have working knowledge of formal engineering development process, VHDL design and verification. An active Secret Clearance is required to start., 8 or more years of professional technical experience. Experience with VHDL design and OSVVM verification for FPGA firmware Experience with AMD/Xilinx series including Zynq, Kintex, Ultrascale, Versal family of devices. Experience with Communication Protocols (I2C, SPI, UART, PCIe, Ethernet) Experience with Electronic Design Automation (EDA) tools: Vivado, Quartus, QuestaSim Knowledgeable in FPGA physical constraints and achieving timing closure. Generation of Test benches and support of formal VHDL Verification. Experience with board RO system level debug using test equipment such as oscilloscopes and logic analyzers. Experience with translating systems requirements into programmable logic requirements, design documents, and test specifications. Candidate should have hands on experience with DoD communications systems.

REQUIRED EDUCATION: Bachelor’s in Science is required. School must be accredited., Applicants responding to this position will be subject to a government security investigation and must meet eligibility requirements by currently possessing the ability to view classified government information.

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