Hardware Design Engineer

Pixels On Target is hiring a Senior Hardware Design Engineer to own board-level design from concept through production. You’ll architect reliable, high-performance embedded hardware and partner closely with firmware, mechanical, and manufacturing teams to ship products at scale.

• 5+ years of board-level hardware design experience shipping products (or equivalent). \n

• Proficiency with ECAD tools (Altium Designer, Cadence OrCAD/Allegro, or KiCad) and strong schematic/layout fundamentals. \n

• Proven experience with embedded system hardware (MCUs/SoCs, memory, PMICs) and low-power techniques for battery- or energy-constrained devices. \n

• Solid grounding in signal and power integrity, impedance control, termination, decoupling, and clocking. \n

• Hands-on lab skills for bring-up, validation, and root-cause analysis using standard bench equipment. \n

• Ability to write clear test plans, reports, and release documentation; fluency with ECOs and design controls. \n

• Effective collaboration with firmware, software, mechanical, thermal, and manufacturing teams. \n

• BS/MS in Electrical or Computer Engineering (or equivalent practical experience). \n, * FPGA/CPLD experience (Verilog/VHDL).

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• Own board design end-to-end: requirements, architecture, component selection, schematics, layout constraints, DFM/DFT, prototyping, and release to manufacturing. \n

• Design multi-layer, high-density PCBs: impedance-controlled routing, length matching, differential pairs, HDI (blind/buried vias), fine-pitch/BGA packages. \n

• Build embedded platforms: microcontrollers/SoCs, memory (DDR/LPDDR), power delivery (PMICs, DC-DCs, sequencing), peripherals and sensors. \n

• High-speed I/O: architect and validate PCIe, USB 3.x, Ethernet, MIPI, LVDS, I2C, SPI, UART, CAN. \n

• Bring-up & debug: lead hardware bring-up with firmware; isolate issues using oscilloscopes, logic/spectrum analyzers, power analyzers, JTAG/SWD, and boundary-scan. \n

• Verification (EVT/DVT/PVT): create and execute test plans for functionality, SI/PI, power/thermal, environmental and reliability; document results and drive fixes/ECOs. \n

• Optimize performance: analyze CPU, memory, I/O, and power budgets; tune for power consumption, thermal efficiency, stability, and cost. \n

• Compliance & quality: design for EMI/EMC and safety; coordinate pre-scan and certification (e.g., FCC/CE/UL); ensure RoHS/REACH compliance. \n

• Manufacturing collaboration: work with CMs/EMS partners on stack-ups, build reviews, test fixtures, yield improvements, and FA/RMA resolution. \n

• Technical leadership: run design reviews, mentor engineers, manage risks/schedules, and maintain crisp documentation in PLM/requirements tools. \n

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