System Performance Architect
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Role details
Tech stack
Job description
As a leading technology innovator, Qualcomm pushes the boundaries of what’s possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path., We are looking for an experienced System Performance Architect to lead system performance explorations for next-generation Mobile, AI and CPU server SoCs. This role drives architecture exploration from early concept through post-silicon, partnering closely with architecture, design, and software teams., * Define and execute system level performance analysis of Infrastructure architecture features, memory controller behavior, and system-level trade-offs in pre-silicon simulation environment
- Identify performance bottlenecks across interconnect, caches, and compute, and propose architecture improvements.
- Contribute to performance sign-off activities, project deliverables, technical reviews, and automation
- Define methodologies, metrics, and KPI frameworks for workload analysis, performance tracking, and feature evaluation.
- Collaborate with cross-functional teams (SoC, NoC, memory controller, DV, power, software) to influence design decisions
- Identify optimization opportunities across both hardware and software, and drive recommendations to architecture, design, compiler, OS, firmware, and application teams Research and track industry trends and innovations in memory architecture such as HBM, 3D-stacked memory, and advanced packaging. *
Requirements
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Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience., Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience., * 6+ years of experience in performance modeling, memory architecture, or system architecture.
- Solid understanding of SOC Architecture, NOC/Fabric architecture, Memory subsystem
- Proficient with performance exploration planning and analysis for complex SOC designs
- Strong C++ proficiency; experience with SystemC/TLM modeling.
- Solid understanding of memory hierarchies and DRAM systems., * Experience with AI/ML, GPU, or HPC-class SoCs .
- Familiarity with post-silicon performance analysis and silicon correlation.
- Ability to translate performance data into clear architectural recommendations.
Benefits & conditions
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range and Other Compensation & Benefits : $145,600.00 - $218,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link .
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