Senior Digital Design Engineer

Beagle
Málaga, Spain
8 days ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience required
8 years minimum
Working hours
Regular working hours

Tech stack

Desktop Computing Logic Synthesis of Circuits Subsystems Systems Integration Verilog VHSIC Hardware Description Language (VHDL) Git Software Version Control

Job description

Connecting Ambitious Tech Companies with Exceptional Talent Partner at Beagle Semiconductor & Embedded Focus LOCATION: Barcelona, Spain SALARY: Negotiable DURATION: Permanent We are looking for a Senior Digital Design Engineer to design and develop high-performance memory subsystems for modern SoCs.You will work within the Memory Design Team and collaborate closely with other engineers to create efficient and robust memory architectures.Responsibilities: Define, design, and implement memory controllers and subsystems (DDR, HBM) Develop and verify RTL (Verilog or VHDL) for memory blocks Work with timing constraints and perform block-level testing Integrate memory IPs into SoC environments Collaborate with cross?functional teams to ensure coherency and high?performance operation Required: 8+ years of industrial experience in digital design Strong knowledge of DDR or HBM memories Proven experience designing or integrating memory controllers Hands?on experience with AXI protocol Proficiency in RTL design (Verilog or VHDL) Experience with timing constraints and basic block?level testing Master’s degree or PhD Experience with version control (git, svn) Knowledge of coherency concepts and protocols Seniority level Mid?Senior level Employment type Full?time Job function Engineering and Design Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Computers and Electronics Manufacturing Referrals increase your chances of interviewing at Beagle by 2x Get notified about new Digital Design Engineer jobs in Barcelona, Catalonia, Spain.#J-*****-Ljbffr

Requirements

Responsibilities: Define, design, and implement memory controllers and subsystems (DDR, HBM) Develop and verify RTL (Verilog or VHDL) for memory blocks Work with timing constraints and perform block-level testing Integrate memory IPs into SoC environments Collaborate with cross?functional teams to ensure coherency and high?performance operation Required: 8+ years of industrial experience in digital design Strong knowledge of DDR or HBM memories Proven experience designing or integrating memory controllers Hands?on experience with AXI protocol Proficiency in RTL design (Verilog or VHDL) Experience with timing constraints and basic block?level testing Master’s degree or PhD Experience with version control (git, svn) Knowledge of coherency concepts and protocols Seniority level Mid?Senior level Employment type Full?time Job function Engineering and Design Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Computers and Electronics Manufacturing Referrals

About the company

increase your chances of interviewing at Beagle by 2x Get notified about new Digital Design Engineer jobs in Barcelona, Catalonia, Spain. #J-*****-Ljbffr

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Apply on www.buscojobs.com.es
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