Compiler Engineer - Machine Learning Compiler

Mythic Inc.
Palo Alto, CA, United States
18 days ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Experienced
Experience required
3 years minimum
Working hours
Regular working hours

Tech stack

Artificial Intelligence C++ (Programming Language) Code Generation Continuous Integration Data Centers Software Debugging Microprocessors Digital Technology Data Flow Control Field-Programmable Gate Array (FPGA) Python (Programming Language) Machine Learning
+12 more
Signal Processing Software Engineering Graphics Processing Unit (GPU) Application Specific Integrated Circuits Pytorch Large Language Models Deep Learning Parallel Computation Backend ONNX (Open Neural Network Exchange) Format C++14 MLIR (Multi-Level Intermediate Representation)

Job description

Compiler Engineer - Machine Learning CompilerPalo Alto, CA / Austin, TX / Remote / Vancouver, BCSoftware - Compiler /Full-time /Remoteapply for this jobAbout usMythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications-whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from -40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.About the roleJoin us in building the next generation of AI compilers. You’ll play a key role in developing the compiler for our novel AI accelerator, working side-by-side with hardware engineers and ML researchers. Your work will shape how deep learning workloads run on cutting-edge dataflow hardware-defining the instruction set, execution model, and developer experience. The result: a compiler that delivers breakthrough performance while remaining seamless and intuitive for ML developers.Here’s what you will doContribute across the full compiler stack, including operator lowering, graph/IR transformations, optimization passes, and backend code generationOptimize for dataflow architectures, developing pipelined schedules, memory orchestration, and resource-constrained execution strategiesCollaborate with hardware architects to influence architectural features, ensuring the compiler and hardware evolve togetherDevelop compilation strategies that unify our analog compute with digital subsystemsBuild and maintain a compiler that produces high-performance binaries with strong debugging support, clear error messages, and predictable performance modelsHere’s the background we hope you will have3+ years of experience building compilers or high-performance systems software, especially those involving complex resource management or optimization.Expert in modern C++ (C++14/17/20) and strong Python.Experience with compiler IRs (SSA-based or graph-based), transformations, and code generationExposure to specialized accelerators (GPU, NPU, FPGA, or custom ASIC) or parallel architecturesThe following would be nice to have, but is not requiredExperience with machine learning compiler stacks (e.g., ONNX, MLIR, TVM, XLA, IREE, PyTorch), with contributions to MLIR or LLVM projects a plusExperience with optimization methods (LP/MIP, CP, SAT/SMT) using solvers like Gurobi or OR-Tools for scheduling and resource allocationExperience compiling for specialized accelerators (GPU, NPU, FPGA, or custom ASIC) on DNN workloads; GPU/DSP experience is valuable if combined with compiler backend work beyond kernel tuningFamiliarity with heterogeneous compilation, especially mixing custom accelerators with CPUs/GPUs/NPUs, and exposure to analog or in-memory compute is a plusExperience collaborating in compiler-hardware co-design (architecture + ISA) for better compiler usability and hardware efficiencyWhat we offerThe opportunity to shape how deep learning and LLM workloads are compiled on novel hardware.A role that spans software and hardware co-design, shaping both the compiler and the accelerator architectureA collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design. We foster an environment of shared learning and technical excellenceCompetitive compensation, equity, and benefits packageAt Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.apply for this job

Requirements

  • 3+ years of experience building compilers or high-performance systems software, especially those involving complex resource management or optimization.
  • Expert in modern C++ (C++14/17/20) and strong Python.
  • Experience with compiler IRs (SSA-based or graph-based), transformations, and code generation
  • Exposure to specialized accelerators (GPU, NPU, FPGA, or custom ASIC) or parallel architectures

The following would be nice to have, but is not required

  • Experience with machine learning compiler stacks (e.g., ONNX, MLIR, TVM, XLA, IREE, PyTorch), with contributions to MLIR or LLVM projects a plus
  • Experience with optimization methods (LP/MIP, CP, SAT/SMT) using solvers like Gurobi or OR-Tools for scheduling and resource allocation
  • Experience compiling for specialized accelerators (GPU, NPU, FPGA, or custom ASIC) on DNN workloads; GPU/DSP experience is valuable if combined with compiler backend work beyond kernel tuning
  • Familiarity with heterogeneous compilation, especially mixing custom accelerators with CPUs/GPUs/NPUs, and exposure to analog or in-memory compute is a plus
  • Experience collaborating in compiler-hardware co-design (architecture + ISA) for better compiler usability and hardware efficiency

Benefits & conditions

What we offer

  • The opportunity to shape how deep learning and LLM workloads are compiled on novel hardware.
  • A role that spans software and hardware co-design, shaping both the compiler and the accelerator architecture
  • A collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design. We foster an environment of shared learning and technical excellence
  • Competitive compensation, equity, and benefits package

About the company

Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications-whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from -40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.

We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets., At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.

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