RTL Engineer / Design Engineer

We are seeking an experienced RTL/ASIC Design Engineer with strong expertise in RTL coding, ARM-based SoC integration, and digital design methodologies., * Develop and implement RTL designs using Verilog/VHDL.

• Integrate ARM-based cores into SoC designs.
• Work with AMBA bus protocols, including AXI, AHB, and APB.
• Perform lint and Clock Domain Crossing (CDC) analysis.
• Support FPGA-based design and prototyping activities.
• Perform ASIC synthesis and Static Timing Analysis (STA).
• Execute equivalence checking to validate design correctness.
• Debug design issues and collaborate with cross-functional engineering teams.

• Strong hands-on RTL design and coding experience.
• Proficiency in Verilog and/or VHDL.
• Experience with ARM-based SoC architecture and integration.
• Knowledge of AMBA AXI/AHB/APB protocols.
• Experience with synthesis, STA, lint, CDC, and equivalence checking.
• Familiarity with FPGA design or prototyping.