IP Integration Engineer

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and especially motivated Analog Mixed Signal IP Integration Engineer! As a member of our dynamic group, you will have the rare and great opportunity to work on upcoming products that will delight and encourage millions of Apple’s customers every day! In this highly visible role, you will support the integration of 3rd party IP in the SOCs developed by Apple. Your job is to verify that the IP deliverables are meeting Apples high quality standards and get flawlessly integrated. The role involves working closely with different cross-functional teams within Apple as well as with external vendors. Occasional travel might be required.Define and specify deliverable requirements for IP provided by external vendors Driving discussions with vendors regarding these requirements, their design and verification methodology Review IP quality on incoming deliverables Provide support to Apple SOC front-end and back-end design teams for integrating the IPBS degree in technical subject area and a minimum 10 years relevant industry experience.Experience with Verilog modeling and model validation is a plus Experience with standards like PCI Express, MIPI, USB or DisplayPort is a plus Excellent written and verbal communication skills Strong initiative and ownership of responsibilities, productive, able to meet aggressive deadlines Experience in RTL design, verification or integration Deep knowledge and experience with front-end tools such as simulation, synthesis, lint, logic equivalence, static timing analysis, CDC, RDC, and UPF Familiarity with SOC design flow and verification methodologies Good understanding of DFT requirements for SOCs Experience writing Verilog, SystemVerilog, SVA hardware description languages

IP (Internet Protocol), System Integration (SI), Apple, USB, Quality Metrics, RTL Design, SystemVerilog, Static Timing Tools, Communication Skills, Verilog Hardware Description Language