Director, Verification

Kepler Computing Inc.
San Jose, CA, United States
7 days ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Compensation
$270,000 - $310,000
Working hours
Regular working hours
Job source

Tech stack

Artificial Intelligence Very-Large-Scale Integration Bash Shell Software Debugging Perl (Programming Language) Formal Verification Field-Programmable Gate Array (FPGA) Make (Software) Joint Test Action (IEEE Standards) Python (Programming Language) Release Management Software Engineering
+6 more
SystemC SystemVerilog Scripting Application Specific Integrated Circuits Kepler Vlsi Design

Job description

We’re looking for a highly experienced Director, Verification to own pre-silicon verification and post-silicon validation for Kepler’s products. This high-impact leadership role sits where architecture, design and software meet. It calls for deep VLSI verification expertise and the ability to build and inspire high-performing teams. You’ll drive complex verification programs from early definition through product development, tapeout and post-silicon bring-up and validation., * Own the end-to-end pre-silicon verification strategy: test plans, testbench development, automated flows and regressions, coverage closure and tapeout signoff.

  • Define and run a comprehensive verification plan: functional coverage, assertion-based verification, constrained-random stimulus, formal verification and AI-assisted flows.
  • Co-lead model-based testing, emulation and FPGA prototyping for pre-silicon verification, software development and architectural validation.
  • Work with architecture, RTL design, DFD and software teams to align verification plans with design intent.
  • Define and run post-silicon bring-up, validation, debug and production qualification.
  • Develop verification IP (VIP) and protocol checkers.
  • Set UVM-based testbench architecture standards and a coverage-driven verification methodology.
  • Build and maintain regression infrastructure: nightly and weekly pipelines, coverage merge and automated triage.
  • Track and publish verification health metrics (coverage, assertion density, regression health) and run regular milestone reviews.
  • Build, lead and mentor a team of verification and emulation engineers.

Requirements

  • B.Tech/M.Tech/MS in EE, Electronics, VLSI Design or a related field.
  • 15+ years of hands-on VLSI front-end verification experience with multiple successful SoC/ASIC tapeouts.
  • Deep expertise in UVM-based verification: testbench architecture, scoreboarding, coverage modeling and constrained-random verification.
  • Strong SystemVerilog skills: interfaces, clocking blocks, SVA, covergroups and testbenches.
  • Thorough understanding of SoC-level verification challenges: CDC, power-aware verification (UPF), memory subsystems, and interrupt and reset validation.
  • Solid knowledge of industry-standard on-chip and memory protocols and VIP integration.
  • Hands-on experience with industry-standard formal verification and simulation tools.
  • Hands-on experience with coverage closure: functional, code and assertion coverage.
  • Good scripting skills (Python, Perl, Shell, Makefile).
  • Exposure to hardware/software co-verification (TLM/SystemC).
  • Experience with post-silicon validation, debug and production test correlation.
  • Excellent leadership and communication skills, with a proven ability to lead teams in a fast-paced environment.
  • Proven record from pre-silicon verification through production release., * Experience with emulation platforms.
  • Familiarity with ML-assisted verification such as coverage prediction and test prioritization.
  • Understanding of DFT-aware verification (scan, BIST, JTAG) and debug architecture.
  • Knowledge of verification challenges in 3D innovations.
  • Familiarity with AI workloads and their memory demands.
  • Prior startup experience with lean teams and aggressive timelines.

Benefits & conditions

Actual compensation will be determined based on factors including, but not limited to, relevant experience, skills, qualifications, education, job responsibilities and work location.

Kepler offers a comprehensive benefits package to eligible employees, including medical, dental and vision coverage, retirement benefits, time off and additional Kepler benefits as applicable. Eligibility and benefit offerings may vary based on employment status and work location.

About the company

Kepler is an Equal Opportunity Employer. We provide equal employment opportunities to all applicants and employees and do not discriminate on the basis of race, color, religion, sex, national origin, age, disability, veteran status, or any other characteristic protected under applicable federal, state, or local law.

We believe that different backgrounds, experiences, perspectives and ideas make our team stronger and help our employees, our technology and our community thrive.

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