Advanced ASIC FPGA Verification Engineer (Sign-on Bonus Available)
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Role details
Tech stack
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Job description
- Familiar with debugging FPGA/ASIC hardware and assisting with HW/SW integration
- Continuous Integration features ofGITLab
Duties and Tasks:
Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
Determines architecture, system simulation and detailed design approach
Defines module interfaces and all aspects of device design and simulation
Creates test and simulation plans that establish functional criteria
Verifies test results and analyzes performance
May also review vendor capabilities and simulation tools
Participates in the improvement of the ASIC/FPGA organizational processes
Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
May provide leadership and/or direction to lower level employees
Independently determines approach to solutions
Contributes to the completion of major programs and projects
Plans and executes project tasks for activities described above
Requirements
Verification Engineering, FPGA, ASIC Verification, Verification Engineering, FPGA, ASIC Verification, Computer Engineering, Mathematics, Electrical Engineering, United States Citizen, Bachelors degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Masterβs degree and 3 years of job-related experience., * In-depth experience using RTL simulation tools such as Siemens Mentor Graphics Questa or Modelsim tools or equivalent in a Linux Environment
- In-depth knowledge ofSystem Verilogobject orientedprogramming and theUniversal Verification Methodology (UVM)
- UnderstandsUVM TestbenchArchitectures
- Comfortable using and developing UVMagents, bus functionalmodels
- Understands different types ofcoverage, usage of cover classes, cover points, etc
- Experience with predictive testbench components,functional coverageandassertions
- Experience withconstrained randomtesting
- Experience with theRegister Abstraction Layer
- Familiarity withrequirements-based verification, requirement tracing, and developing requirement verification strategies etc
- Experience with scripting languages such as Linusshell scripts, TCL, Python
- Familiarity with usingFormalVerification tools, code coverage, writing waivers etc
- Familiarity with the following are also helpful
- Questa Verification IP (QVIP)
- Developing UVM testbenches for designs implemented inXilinxdevices with XilinxIPandSoCs
- AXIprotocols, PCIe, Space Wire, and Ethernet interfaces, This candidate must have an ability to operate in a team environment and learn new skills to accomplish the verification goals.
Proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories
Proficient in the principles and techniques of ASIC/FPGA design and the design process
Keeps abreast of technology trends
Proficient awareness of business objectives and Engineerings role in achieving
Proficient in Microsoft Office applications
Proficient written and verbal communications skills
Ability to think creatively
Ability to multi-task
Proficient skill in communicating issues, impacts, and corrective actions
Regular contact with senior levels of internal work groups
Works under limited direction, * Clear understanding of embedded micro-processing systems, FPGA Design and Verification using VHDL, and digital circuit analysis and design
- Collaborative, creative thinker with high proficiency in technical problem solving
- Team player with effective communication and presentation skills
- Experience designing high speed interfaces and complex memory designs
- Commitment to ongoing professional development for yourself and others
- Identifies opportunities to apply AI for continuous improvement and innovation
Benefits & conditions
- Research oriented work, alongside award winning teams developing practical solutions for our nations security
- Flexible schedules with every other Friday off work, if desired (9/80 schedule)
- Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more
- See more at gdmissionsystems.com/careers/why-work-for-us/benefits
Workplace Options:
This position is fully remote, on-site or hybrid/flex, as mutually agreed.
About the company
General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!
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