Staff Chip Design Engineer

• Serve as the domain experts, embedding chip design experience into a team creating AI chip design assistants
• Bridge research and production. Collaborate closely with ML and SW teams to integrate experimental models into scalable pipelines.
• Define data-processing pipelines, training orchestration, and evaluation frameworks to accelerate iteration on large-scale experiments.
• Analyze and iterate. Dive deep into large datasets-experimental logs, simulation outputs, and user interaction traces-to diagnose model behavior, surface failure modes, and drive evidence-based improvements.
• Publish and present. Document findings in technical reports, contribute to open-source projects, and present work internally (and externally, when appropriate) to help shape the broader AI research community.

• Masters in Computer Science, Electrical Engineering, or a closely related field
• 10-15 years of experience in RTL design, or a combination of design and verification
• Proficiency in SystemVerilog and Python languages
• Excellent written and verbal communication skills, esp to convey chip design knowledge to scientists/engineers in other fields
• Comfortable working in a dynamic, research-heavy startup environment
• Demonstrated coursework or project experience in machine learning and/or deep learning

Bonus Points

• Personal projects showcasing innovation, creativity, and continuous learning
• Knowledge of industry-standard communication protocols (SPI, I2C, AXI, Ethernet, PCIe, DDR5, etc)
• Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)
• Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc)
• Experience with FPGA development (Vivado, Vitis, Quartus, etc), front end, IP integration, and/or back end