FPGA Engineer
Sky Spy Inc
München, Germany
5 days ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Working hours
Regular working hours
Job source
Tech stack
Beamforming
C++ (Programming Language)
Software Debugging
Logic Synthesis of Circuits
Embedded Software
Ethernet
Field-Programmable Gate Array (FPGA)
Python (Programming Language)
PCI Express
Signal Processing
Static Timing Analysis
System on a Chip
+8 more
SystemVerilog
Tcl (Programming Language)
Verilog
VHSIC Hardware Description Language (VHDL)
Vivado
Fpga Hardware
Event Driven Architecture
Hardware Debugging
Job description
- Design and develop FPGA/SoC solutions based on Xilinx 7-Series and UltraScale/UltraScale+ devices.
- Develop RTL designs using VHDL and Verilog.
- Implement and optimize DSP algorithms, including FIR/IIR filters, FFT, DDC/DUC, decimation/interpolation, mixers, NCOs, and other signal-processing blocks.
- Develop digital signal-processing chains for RF / SDR systems.
- Work with high-speed data paths and streaming architectures.
- Integrate FPGA logic with Xilinx SoC and embedded processor subsystems.
- Perform RTL simulation, verification, and hardware debugging.
- Optimize FPGA designs for timing closure, resource utilization, and performance.
- Work with Xilinx Vivado, synthesis, implementation, constraints, and Xilinx IP cores.
- Analyze and resolve timing, clock-domain, and hardware-related issues.
- Collaborate with hardware, embedded software, DSP, and RF engineers.
Requirements
- 5+ years of commercial experience in FPGA development.
- Strong knowledge of VHDL and/or Verilog; experience with both is a plus.
- Hands-on experience with Xilinx FPGA/SoC platforms, including:
- 7-Series;
- UltraScale / UltraScale+;
- Zynq SoC.
- Solid understanding of digital design and RTL development.
- Practical experience implementing DSP algorithms on FPGAs.
- Understanding of RF signal processing and SDR architectures.
- Experience with Xilinx Vivado and Xilinx IP.
- Good understanding of timing analysis, clock-domain crossing (CDC), reset strategies, and FPGA constraints.
- Experience debugging FPGA designs on real hardware.
Nice to Have
- Experience with Zynq-7000 / Zynq UltraScale+ MPSoC.
- Knowledge of AXI4 / AXI-Stream.
- Experience with high-speed interfaces such as JESD204, Ethernet, PCIe, DDR, etc.
- Experience implementing FFT, DDC/DUC, channelizers, beamforming, and other DSP blocks.
- Experience with ADC/DAC interfaces and RF transceivers.
- Knowledge of SystemVerilog, Tcl, Python, or C/C++.
- Experience with hardware/software co-design.
- Strong understanding of fixed-point arithmetic and FPGA-oriented DSP optimization.
Benefits & conditions
- Above-market salary.
- Company equity package.
- Dynamic and flexible work schedule.
- The opportunity to contribute directly to meaningful technology that protects lives.
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About the company
Sky Spy is a fast-growing dual-use startup developing next-generation RF intelligence solutions for contested environments. We are backed by leading European VCs, combat veterans, and technologists. Our mission is to deliver intelligence that saves lives and empowers allied forces worldwide.
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