Physical Design Engineer - DSP Team

• Update the physical implementation flows for optimum PPA (power, performance, and area)
• Drive the development of semi-custom design techniques where appropriate to maximize utilization, performance, and power efficiency
• Use and extend/enhance design methodologies to achieve the best PPA through scripting
• Work independently with little supervision in collaboration between physical design and logic teams
• Use verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels; may require strong negotiation, influence, and communication to large groups or high-level constituents
• Have a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to provide input on key decisions)
• Complete tasks that do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework
• Exercise substantial creativity to innovate new processes, procedures, or work products within guidelines or to achieve established objectives
• Use deductive and inductive problem-solving; multiple approaches may be taken/necessary to solve the problem; advanced data analysis and interpretation skills are required
• Use tools/applications (e.g., Fusion Compiler) to execute advanced architecture and design of multiple complex blocks and make suggestions for design protocol
• Run advanced power checks on multiple blocks to ensure design specifications are met; make recommendations to leadership when specifications are not met

• Bachelor’s degree in Science, Engineering, or related field
• 12+ years ASIC Physical design, Synthesis or related work experience
• Strong proficiency in P&R, timing analysis, CAD tools (e.g., Synopsys FC/DC, ICC2 or Cadence Genus, Innovus)
• Very good understanding of logic optimization to drive high-speed design implementation, clock structures and power optimization, * Bachelor’s degree in Electrical Engineering, Computer Science, or Computer Engineering
• 15+ years CPU or GPU design or related work experience
• 10+ years of experience with architecture and design tools
• 10+ years of experience with scripting tools and programming languages, * Bachelor’s degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience
• Master’s degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience
• PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience

Pay range: $164,000.00 - $246,000.00. Additional compensation includes an annual discretionary bonus program and the possibility of annual RSU grants.

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