Founding AI Accelerator Architect (Research & Hardware Co-Design)

An innovative AI hardware startup is seeking an exceptional Founding AI Accelerator Architect to lead research and development into next-generation accelerator architectures for large language model (LLM) inference. This is a unique opportunity for a highly technical researcher or engineer to rethink how AI models are implemented in silicon and help shape the future of AI inference hardware.

The successful candidate will work at the intersection of computer architecture, digital hardware, machine learning, and hardware software co-design. You will explore innovative approaches to computation, memory systems, low-precision arithmetic, and model-specific hardware optimization while developing simulations and prototypes to validate new concepts.

Working directly with the founders and ASIC engineering team, you will have significant ownership of architectural research and technical direction, taking ideas from early-stage investigation through prototype development and eventual silicon implementation., * Research and develop novel accelerator architectures for LLM inference, focusing on binary and ternary weights, model-specific computation, and efficient data movement.

• Explore how model weights and operations can be encoded directly into silicon and identify opportunities for hardware reuse across different models.
• Evaluate trade-offs involving model quality, inference latency, throughput, silicon area, and power consumption.
• Design and evaluate compute architectures, memory hierarchies, attention mechanisms, KV-cache systems, and low-precision arithmetic.
• Investigate automated approaches to translating model architectures and trained weights into efficient hardware implementations.
• Explore compiler-driven RTL generation and other automated hardware-generation methodologies.
• Build architectural simulators, performance models, and FPGA prototypes to validate research concepts before committing to silicon.
• Evaluate hardware architectures quantitatively and identify opportunities to improve performance and efficiency.
• Collaborate with founders and ASIC engineers to translate promising research into implementable microarchitectures.
• Help define the long-term technical direction of next-generation AI inference hardware.
• Use AI-assisted tools to accelerate research, development, and experimentation., * Help develop a new approach to AI inference hardware from the earliest stages of research and development.
• Rethink conventional processor architectures and explore innovative ways to implement neural networks directly in silicon.
• Work directly with the founders and have meaningful ownership of critical architectural decisions.
• Take ideas from theoretical research and experimentation through working prototypes and physical chip development.
• Collaborate with a small, technically ambitious team focused on solving challenging problems in AI hardware.
• Influence the long-term technical direction and architecture of next-generation inference accelerators.
• Work in an environment that values independent thinking, rigorous experimentation, technical excellence, and practical innovation.
• Make a foundational contribution to an emerging technology platform with significant opportunities for technical ownership.

• Strong research or engineering background in computer architecture, digital hardware, AI accelerators, or hardware software co-design.
• Ph.D. in Computer Engineering, Electrical Engineering, Computer Science, or a related field preferred; equivalent research or engineering experience is also welcome.
• Experience designing, implementing, or evaluating hardware accelerators for neural networks or other computationally intensive workloads.
• Deep understanding of digital architecture, including datapaths, pipelining, parallelism, memory systems, and data movement.
• Familiarity with RTL design and verification.
• Strong programming skills and the ability to work across software, architecture, and hardware development.
• Ability to approach open-ended research problems, develop hypotheses, build prototypes, and evaluate results quantitatively.
• Strong analytical and problem-solving skills, with the ability to identify promising technical approaches and distinguish them from impractical solutions.
• Intellectual curiosity, original thinking, and a willingness to challenge established hardware design approaches.
• Comfort using AI tools to support research, development, and experimentation.
• Experience with LLM or transformer accelerators, including attention mechanisms and KV-cache optimization, is highly valuable.
• Knowledge of binary, ternary, or other low-precision neural networks, model compression, quantization, sparsity, or inference optimization is beneficial.
• Experience with hardware generation, compiler development, XLS, or automated RTL generation is a plus.
• Experience with FPGA-based neural network acceleration, compute-in-memory, near-memory computing, or hardwired neural network architectures is advantageous.

• Direct collaboration with the founders and ASIC engineering team.
• Significant ownership over research priorities and hardware architecture decisions.
• Opportunity to contribute to the development of physical AI accelerator chips.
• Work within a small, fast-moving team focused on advanced AI inference technology.