Senior Engineer, Design Verification Engineering

Support and accelerate product development of industry leading products involving behavioral modeling of analog circuits, spice, and mixed-signal verification, full-chip verification, and digital circuit verification. Establish and promote the adoption of metric driven verification best practices. Apply verification methodologies to reach verification goals, including creating System Verilog simulation environments and infrastructure to verify functionality, accuracy, and performance and integrate models into full-chip simulations. Correlate results with multidisciplinary teams involved in the design. Support design teams in identifying, debugging, and resolving issues. Assist in developing project verification strategies, planning, resource tracking, and results analysis, to ensure on-schedule product delivery.

Position is a telecommuting role and can be performed from anywhere in the U.S. Position reports to the headquarters.

Requirements: Must have a Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or closely related technical field (willing to accept foreign education equivalent) and two (2) years of experience as a Design Verification Engineer or related occupation performing IC design or validation.

In the alternative, a Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or closely related technical field (willing to accept foreign education equivalent) and four (4) years of experience as a Design Verification Engineer or related occupation performing IC design or validation.

Must also possess the following (quantitative experience requirements not applicable to this section):

• Demonstrated Expertise (“DE”) in Perl or Python scripting for data processing, data design creation, data collection, analysis, design automation tools controls, and input/output data formatting.
• DE executing the full lifecycle of design/verification, including verification planning, test bench and test case development, architecting coverage and performing system debugging utilizing Cadence Xcelium simulator suite, Synopsys VCS or equivalent.
• DE driving metric-driven verification, including specifying, developing, and leveraging advanced verification capabilities using System Verilog, UVM, and coverage analysis.
• Demonstrated understanding of analog and digital circuits through prior work experience and coursework.
• DE eliciting and communicating complex technical details before key stakeholders.

Shift Type: 1st Shift/Days

• Actual wage offered may vary depending on work location , experience, education, training, external market data, internal pay equity, or other bona fide factors.
• This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
• This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today’s innovators stay Ahead of What’s Possible. Learn more at www.analog.com and on LinkedIn and X .