VHDL Digital Engineer
Indotronix International Corporation
San Diego, CA, United States
3 months ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Working hours
Regular working hours
Job source
Tech stack
Adobe InDesign
Bash Shell
Boolean Algebra
Computer Engineering
Software Debugging
Perl (Programming Language)
Formal Verification
Field-Programmable Gate Array (FPGA)
Make (Software)
Regression Testing
Shell Script
Tcl (Programming Language)
+3 more
VHSIC Hardware Description Language (VHDL)
Information Technology
Software Defined Radio
Job description
Seeking a Senior FPGA Verification Lead Engineer to support the design verification and validation of FPGA-based software-defined radio and DoD communication systems. This role will provide hands-on technical leadership, mentor verification engineers, and drive FPGA verification activities throughout the product lifecycle., * Lead and mentor a team of 2-4 VHDL verification engineers
- Define and maintain FPGA and digital logic verification frameworks and architectures
- Develop verification plans based on design requirements and technical specifications
- Simulate, verify, and validate FPGA logic designs and system functionality
- Analyze and debug simulation failures, identify root causes, and support issue resolution with design teams
- Perform regression testing and generate verification metrics and status reports
- Support FPGA product lifecycle activities including requirements, design, verification, and production release
- Coordinate with cross-functional engineering teams and program management to ensure project execution and schedule compliance
- Support technical planning, task estimation, forecasting, and schedule management
- Participate in design reviews, verification reviews, and technical meetings
Requirements
- Strong experience in VHDL design and verification methodologies
- Experience with FPGA-based DoD communication or software-defined radio systems
- Experience developing verification plans, test benches, functional tests, and bus functional models
- Proficiency with Siemens Questa Simulator
- Strong analytical, troubleshooting, and debugging skills
- Experience managing technical tasks, schedules, and deliverables
- Strong communication and collaboration skills in a team environment
- Ability to obtain and maintain a U.S. Security Clearance
Preferred Skills
- Active Security Clearance
- Experience leading FPGA verification teams
- Experience with OSVVM verification methodology
- Experience with Linux scripting languages such as Perl, TCL, Bash, or Makefile
- Experience with Siemens formal verification tools including Lint, Inspect, and CDC
- Experience with cost tracking and metric reporting
- Ability to obtain Special Access Program clearances, Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field with typically 12+ years of professional experience in FPGA verification, digital logic design, or related engineering disciplines.
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