Design Engineer

Role Summary: Architecture and RTL implementation of high-speed datapaths and control logic. Focuses on high-throughput data movement and the integration of PCIe and Ethernet protocols with embedded micro-controllers.

Core Responsibilities:

• Datapath Design: Architect and implement high-speed, low-latency datapaths and complex FSMs in (System)Verilog.
• Protocol Integration: Lead the design and integration of PCIe and Ethernet sub-systems.
• Controller Interfacing: Design interfaces between high-speed logic and embedded micro-controllers.
• Hardware Debug: Perform hands-on debug and performance tuning of PCIe/Ethernet traffic.

• Expert-level SystemVerilog/Verilog for high-speed digital design.
• Deep knowledge of PCIe and Ethernet and datapath optimization.
• Practical experience with protocol analyzers and hardware-level debugging is a plus.
• Bachelor's plus 8+ years OR Master's in Engineering plus 6+ years related industry experience.

The annual base salary range for this position is $108,000 - $192,000

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.