Design Engineer III
Mercor, Inc.
San Francisco, United States of America
6 days ago
Role details
Contract type
Permanent contract Employment type
Full-time (> 32 hours) Working hours
Regular working hours Languages
English Compensation
$ 198KJob location
Remote
San Francisco, United States of America
Tech stack
Artificial Intelligence
Data analysis
Big Data
Computer Engineering
Python
Machine Learning
Information Technology
Power Analysis (Cryptography)
Physical Design
Job description
- Perform comprehensive power analysis at various design stages, from RTL to GDSII.
- Develop, improve, and automate power analysis flows using large datasets for power modeling.
- Investigate and address power inefficiencies; provide actionable feedback to the RTL design team.
- Utilize industry-standard tools like PrimeTime PX/PrimePower for power analysis and reduction.
- Work independently and collaborate asynchronously to enhance power modeling processes., PS: Our team reviews applications daily. Please complete your AI interview and application steps to be considered for this opportunity.
Requirements
Must-Have
- Experience with RTL-to-GDSII design flow in advanced technology nodes (7nm and below).
- Expertise in low-power implementation and signoff.
- Proven experience with Python and ML/AI frameworks.
- Bachelor's degree in Electrical/Computer Engineering or Computer Science.
Preferred
- Experience with synthesis and Place and Route (PnR) flows.
- Skills in data analysis and machine learning approaches.
- Master's degree preferred.
About the company
Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark, General Catalyst, Peter Thiel, Adam D'Angelo, Larry Summers, and Jack Dorsey.
