Student project: Neuromorphic Compression IC Design in High-Bandwidth Brain-Computer Interfaces

• Conduct a systematic study of existing approaches for high-channel-count neural recording systems (>1,000 channels)
• Review literature on neural data compression and serialization techniques
• Develop system-level models based on proposed design concepts
• Implement the design through the tape-out flow
• Perform verification and validation of the proposed hardware design

What we do for you

You will join a multidisciplinary team working at the intersection of neural interfaces, data compression, and hardware design. The project addresses the challenge of handling large-scale neural recording data from high-channel-count systems, where efficient compression, serialization, and low-power hardware implementation are critical.

• You are a motivated student with a background in electrical engineering, microelectronics, computer engineering, or a related field
• You have basic knowledge of digital hardware design and system architecture
• You are familiar with HDL languages such as Verilog, SystemVerilog, or VHDL
• You have an interest in neural interfaces, biomedical circuits, or signal processing
• Basic analog circuit knowledge is a plus, especially for understanding neural recording front-end systems
• You are comfortable with simulation, modelling, and debugging
• You are eager to learn about data compression, serialization, verification, and tape-out flow
• You can work independently while actively communicating within a multidisciplinary team