DDR PHY System Design Engineer

• Analysis and ownership of DDR PHY system and architecture
• Development of system timing budgets, both on-die and off-chip.
• Lead and deliver best-in-class solutions for product needs, Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

• 5-10 years in DDR PHY system design/architecture
• Strong knowledge in JEDEC DDR standards (LPDDR/PCDDR/HBM, etc.) and implication to DDR PHY system design/architecture
• Strong knowledge of link-budgets and trainings
• Strong communication skills; proven ability to collaborate across global teams

Preferred Qualifications:

• Knowledge of signal integrity and power delivery for server products
• Knowledge of latest process technology nodes and mixed-signal designs
• Solid understanding of design-for-yield and production challenges in high-speed links
• Unix/Perl/TCL scripting (must be comfortable with writing scripts)

Keywords

• DDR, DRAM, PHY, high-speed interface, signal integrity, power integrity.

Educational Requirements

• Required: Bachelor's, Electrical Engineering
• Preferred: Master's, Electrical Engineering, Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits: $140,000.00 - $210,000.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.