Design Engineer III

• Perform comprehensive power analysis across all design stages, from RTL through GDSII
• Develop, improve, and automate power analysis and modeling flows
• Analyze large datasets for power estimation and modeling, leveraging scripted and ML?based approaches
• Identify power inefficiencies and provide actionable RTL optimization feedback
• Support low?power implementation and sign?off, including:

• Power gating
• Multi?voltage designs
• UPF?based methodologies

Do you have experience in Semiconductor experience?, Do you have a Bachelor's degree?, * Hands?on experience with RTL?to?GDSII design flows at 7nm or below

• Strong expertise in low?power design and signoff

• Power gating
• Multi?voltage rails
• Unified Power Format (UPF)

• Proven experience using PrimeTime PX / PrimePower for power analysis and reduction
• Proficiency in Python scripting
• Experience leveraging ML / AI frameworks for analysis or modeling
• Solid working knowledge of RTL design principles
• Experience with RTL power optimization tools (e.g., Power?Artist)
• Ability to rapidly learn, iterate, and improve power solutions, * Experience with synthesis and Place & Route (PnR) flows
• Power analysis of IP blocks and development of runtime estimation models
• Data analysis, modeling, and machine learning-driven power estimation
• Familiarity supporting software or firmware teams with power modeling inputs, * Required: Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
• Preferred: Master's degree (not required) #PowerAnalysis #LowPowerDesign #VLSI #SemiconductorJobs #RTLDesign #ChipDesign #PythonEngineering #EDA #LI-KT1 #INDOEM

Pulled from the full job description

• Paid time off