ASIC Verification Technical-Lead Engineer

Retym, Inc.
Austin, United States of America
yesterday

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English
Experience level
Senior

Job location

Austin, United States of America

Tech stack

Very-Large-Scale Integration
Communications Protocols
Software Debugging
Logic Synthesis of Circuits
Perl
Ethernet
Formal Verification
Python
Oracle Virtual Machine
PCI Express
Verification and Validation (Software)
SystemVerilog
Scripting (Bash/Python/Go/Ruby)
Application Specific Integrated Circuits

Job description

  • Lead, mentor, and manage a team of verification engineers to meet project milestones and deliverables.
  • Define and execute verification strategies and plans for complex digital blocks and systems.
  • Oversee the development of robust and reusable verification environments using SystemVerilog and UVM.
  • Review and approve verification plans, testbenches, and coverage metrics.
  • Drive functional and coverage-based verification across multiple block/system verification cycles.
  • Collaborate with design engineers to debug and resolve functionality issues.
  • Ensure effective resource allocation and project planning to achieve optimal results.
  • Foster a culture of technical excellence, continuous learning, and innovation within the team.
  • Report verification progress, issues, and risks to senior management and other stakeholders.

Requirements

Do you have experience in Team motivation (leadership skill)?, * 10+ years of experience in digital design verification-a must.

  • 3+ years of experience managing or leading verification teams.
  • Proven track record of completing two or more full block/system verification cycles.
  • In-depth knowledge of VLSI verification flows, concepts, methodologies and interfaces with algorithmic models and SW.
  • Expertise in verification using SystemVerilog, UVM, or other industry-standard methodologies (eRM, OVM).
  • Experience in block, cluster and full chip verification levels.
  • Strong problem-solving skills and the ability to debug complex functionality issues.
  • Excellent leadership, communication, and organizational skills to manage and inspire a team.

Preferred Qualifications

  • Hands-on experience with high-speed communication protocols like Ethernet, PCIe, or SerDes.
  • Proficiency in scripting languages (e.g., Python, Perl) for automation of verification processes.
  • Familiarity with formal verification techniques and tools.
  • Background in system-level verification or post-silicon validation.
  • Experience with project planning tools and methodologies for effective team management.

Apply for this position